3D Connector for Low Resistance Power Delivery in Semiconductor Packages
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Solution Overview
Problem
Conventional semiconductor device assembly techniques using thin metallic bond wires for power or ground connections face limitations such as high resistance, voltage drop, noise, and reduced current capacity due to resistance, capacitance, and inductance, as well as complexity and cost issues with thicker wire alternatives.
Innovation Solution
A system and method involving a connector with a center pad electrically coupled to the die via conductive bumps and a finger extending to the package base, offering a lower resistance path than bond wires, allowing for thicker and wider connections to enhance current flow and reduce routing on silicon, while optionally using a multilayer substrate or partitioned metal pattern to manage inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If thin metallic bond wires are used for power or ground connections, then the device complexity is reduced, but the resistance increases causing voltage drop and limiting current capacity
Solution Approach 1:
The patent transitions from planar bond wire connections to a three-dimensional connector structure with vertical pins and horizontal fingers that extend into the package cavity. This dimensional change allows for thicker, lower-resistance conductive paths while maintaining compact packaging, directly resolving the contradiction between simplicity and power delivery reliability.
Solution Approach 2:
The patent changes the physical parameters of the connection structure by using substantially thicker and wider connector fingers compared to traditional bond wires. This parameter change reduces resistance and inductance, enabling higher current capacity and improved voltage stability without significantly increasing overall device complexity.
2Reliability
If thicker gold bond wires are used to reduce resistance, then the current capacity increases, but the manufacturing cost increases
Solution Approach 1:
The patent employs a composite connector structure combining copper or copper-alloy pins with gold-plated fingers and contact surfaces. This composite approach provides the low resistance and high current capacity of copper while adding only thin gold plating layers for corrosion resistance and solderability, significantly reducing material cost compared to solid gold bond wires while maintaining high current capacity.
Solution Approach 2:
The patent changes the cross-sectional dimensions of the conductive path by using substantially thicker and wider connector fingers compared to traditional bond wires. This parameter change reduces resistance and inductance, enabling higher current capacity and improved voltage stability without significantly increasing overall device complexity.
3Reliability
If more bond pads are used on the die periphery for power or ground, then the current capacity increases, but the die size increases
Solution Approach 1:
The patent moves power and ground connections from the two-dimensional die periphery to a three-dimensional space above the die surface. The connector fingers extend vertically and horizontally into the package cavity, allowing multiple power and ground connections without increasing die footprint, thus resolving the contradiction between power distribution capability and die area.
Solution Approach 2:
The patent introduces an intermediary connector structure that provides multiple internal power and ground connection points between the die and package base. This intermediary allows extensive power distribution capability without requiring corresponding increases in die periphery bond pads, as the connector provides additional connection pathways in the vertical and horizontal space above the die.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a low resistance, high-conductivity path for efficient power and ground signal transfer, reducing IR drop, enabling die size reduction, and improving thermal performance by minimizing the number of peripheral bond pads and bond wires, while maintaining or enhancing current capacity.
Implementation Method 1
a center pad electrically coupled to the die by a plurality of conductive bumps
Implementation Method 2
A resistance of a conductive path via the connector is much less than a resistance of a conductive path via any one of the plurality of bond wires to facilitate an efficient transfer of the at least one of power or ground signal
Data Source
AI summary
In a method for transferring at least one of power and ground signal between a die and a package base of a semiconductor device, a connector is formed there between. The connector, which is disposed above the die attached to the package base, includes a center pad electrically coupled to the die by a plurality of conductive bumps and a finger extending outward from the center pad towards the package base. The finger is electrically coupled to the package base by a conductive pad. A plurality of bond wires are formed to electrically couple the package base and the die. A resistance of a conductive path via the connector is much less than a resistance of a conductive path via any one of the plurality of bond wires to facilitate an efficient transfer of the at least one of power and ground signal.