Consolidated Memory Region Descriptions for Faster NVMe Reads

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Solution Overview

Problem

Conventional memory systems face inefficiencies due to the need to repeatedly traverse and access a large number of variably sized and located memory regions on the host system, leading to increased overhead and reduced operational efficiency, particularly in NVMe-based data transfers.

Innovation Solution

The implementation of consolidated memory region description data, which identifies contiguous memory regions on the host system, allowing for a simplified and smaller data format that can be stored and accessed efficiently by the memory sub-system, reducing the need for repeated access and optimizing data bus usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a large number of variably sized memory regions are established on the host system, then the memory sub-system can flexibly allocate buffers for data transfer, but the memory sub-system must repeatedly traverse the Scatter Gather List, increasing overhead and reducing operational efficiency

Engineering Contradiction:
Improvebuffer allocation flexibilityVSAvoiddata transfer efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The host system pre-consolidates the Scatter Gather List into a contiguous memory region description before the memory sub-system needs to access it. This preliminary consolidation action eliminates the need for repeated traversal during actual data transfer operations, resolving the contradiction between flexible buffer allocation and transfer efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Multiple scattered memory region descriptors are merged into a single consolidated contiguous memory region description. This merging reduces the number of individual memory regions from many variable-sized regions to one unified structure, eliminating repeated traversal overhead while preserving the ability to describe multiple buffers.

Inventive Principle:
Principle #5Merging (Combining)

2Loss of information

If the Scatter Gather List describes many individual memory regions, then detailed buffer information can be provided, but the data structure becomes large and requires repeated access, increasing overhead

Engineering Contradiction:
Improvebuffer description completenessVSAvoiddata structure size
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

Instead of directly accessing the large original Scatter Gather List structure multiple times, the host system creates a simplified copy in the form of a consolidated contiguous memory region description. This copy contains all necessary buffer information in a compact format that can be accessed efficiently without repeated traversal of the original complex structure.

Inventive Principle:
Principle #26Copying

3Quantity of substance

If buffers are spread around local memory based on space availability, then memory utilization is optimized, but the memory sub-system must traverse the Scatter Gather List repeatedly to access scattered regions

Engineering Contradiction:
Improvememory utilizationVSAvoidtraversal time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The solution transforms the problem from managing scattered memory regions in physical space to managing a single virtual contiguous region. By introducing a new dimension of abstraction (the consolidated description structure), the system can represent scattered buffers as if they were contiguous, eliminating traversal time while maintaining optimal memory utilization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12461680B2Operation based on consolidated memory region description data
Publication Date: 2025.11.04 MICRON TECHNOLOGY INC
  • US12461680B2 patent drawing
  • US12461680B2 patent drawing
  • US12461680B2 patent drawing

AI summary

Various embodiments enable a memory sub-system to perform a read operation based on consolidated memory region description data, which can be generated based on a memory region description data (e.g., SGL) provided by a host system for the read operation.