Constant Transconductance Biasing Circuit for PVT Stability
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Solution Overview
Problem
Existing electronic circuits fail to maintain constant transconductance across Process, Voltage, and Temperature (PVT) variations, leading to inaccurate biasing and transconductance definition in CMOS technologies, especially in deep submicron technologies where MOSFET behavior deviates from the quadratic model.
Innovation Solution
Incorporating additional NMOS transistors M1b and M2b of the same type as M1a and M2a in the constant-gm biasing circuit, along with a variable resistor element Rbv, to ensure transconductances are practically constant against PVT variations, and accurately mirror biasing conditions to connected circuits, enabling robust transconductance and current mirroring.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional constant-gm circuit with current mirror and transistor pair is used, then transconductance is partially compensated against PVT variations, but transconductance errors remain significant in deep submicron technologies
Solution Approach 1:
The biasing circuit is segmented into multiple transistor pairs (first transistor pair M1a, M2a and second transistor pair M1b, M2b) with distinct functions. The first pair establishes basic bias conditions while the second pair specifically targets transconductance stabilization, allowing each segment to optimize its contribution to overall transconductance accuracy across PVT variations
Solution Approach 2:
The circuit creates a replicated biasing environment by introducing a second transistor pair M1b, M2b that mirrors the configuration of the first pair M1a, M2a. This copying approach allows the circuit to establish multiple identical transconductance paths, thereby averaging out process variations and achieving more accurate transconductance definition
2Reliability
If additional transistor pairs are added to improve transconductance constancy, then PVT robustness is enhanced, but circuit complexity increases
Solution Approach 1:
The additional transistor pair M1b, M2b is designed to be functionally identical to the first pair, allowing them to serve multiple purposes: establishing bias currents, defining transconductance, and providing PVT compensation. This universal design approach enhances robustness without requiring fundamentally different circuit topologies, thereby limiting complexity growth
3Use of energy by moving object
If MOSFETs are biased in weak inversion to maximize transconductance efficiency, then transconductance per current is improved, but output resistance decreases due to DIBL effect
Solution Approach 1:
The circuit operates MOSFETs in the weak inversion region by carefully selecting bias currents and resistor values (Rb1, Rb2) to establish appropriate voltage drops. This parameter adjustment maximizes transconductance efficiency (gm/Idd) while the subsequent PVT compensation mechanisms counteract the adverse DIBL effects on output resistance
Data Source
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AI summary
An electronic biasing circuit provides a DC bias voltage (Vg) to a circuit (AMPL; AMPLdiff) to be biased. The biasing circuit has a first transistor (M1a) and a second transistor (M2a). A gate of the first transistor (M1a) is connected to a gate of the second transistor (M2a) and supplies the DC bias voltage. A source of the first transistor (M1a) is connected to a supply reference voltage. A source of the second transistor (M2a) is connected to the supply reference voltage via a resistor element (Rb). The currents flowing through the first and second transistor (M1a, M2a) are forced to be equal. A third transistor (M1b) is connected in series with the first transistor (M1a) and a fourth transistor (M2b) is connected in series with the second transistor (M2a). A gate of the third transistor (M1b) is connected to a gate of the fourth transistor (M2b). A source of the third transistor (M1b) is connected to a drain of the first transistor (M1a). A source of the fourth transistor (M2b) is connected to a drain of the second transistor (M2a). Currents flowing through the third and fourth transistors (M1b, M2b) are forced to be equal.