Constant On Time Control Circuit Reducing Voltage Ripple
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Solution Overview
Problem
Conventional DC to DC converting circuits face issues with large voltage ripple and DC offset voltage, particularly when the output voltage is low, due to noise interference and limitations in equivalent series resistance and operation frequency.
Innovation Solution
A constant on time control circuit with a comparing circuit and logic circuit is introduced, utilizing a differential pair, a base current source, and an extra current source to inject a substantial ramp current into one channel of the differential pair, allowing for periodic control of the duty cycle and reducing noise interference by compensating voltage ripple and offset voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a wider hysteresis window is set for noise immunity, then noise interference is reduced, but voltage ripple on the output voltage increases
Solution Approach 1:
The patent introduces an intermediary signal processing mechanism that separates noise filtering from ripple compensation. The hysteresis comparator processes noise with adequate immunity, while the ripple compensation circuit independently processes voltage ripple through a different pathway, allowing both functions to coexist without compromising each other's performance
2Object-generated harmful factors
If the equivalent series resistance of the output capacitance is increased to compensate for voltage ripple, then voltage ripple is reduced, but the operation frequency cannot be set high
Solution Approach 1:
The patent segments the voltage ripple compensation function into a separate circuit module independent of the output capacitance's ESR. By using a dedicated ripple compensation circuit that generates a compensation signal based on the switching frequency, the system achieves ripple reduction without relying on high ESR capacitance, thereby maintaining high operation frequency capability
Solution Approach 2:
The patent changes the approach from passive ESR-based ripple compensation to active parameter-controlled compensation. By dynamically adjusting the compensation signal parameters (amplitude and phase) based on operating conditions, the system can effectively compensate for voltage ripple across a wide frequency range without being constrained by capacitance ESR limitations
3Speed
If ripple injection is performed into the feedback control loop, then operation frequency can be increased and ESR limitations are overcome, but DC offset voltage appears in the output voltage
Solution Approach 1:
The patent extracts the DC offset component from the ripple compensation signal through separate processing pathways. The AC ripple compensation function is maintained while the DC component is independently managed and eliminated, preventing DC offset voltage from appearing in the output while preserving the benefits of ripple injection for high-frequency operation
Data Source
AI summary
A constant on time control circuit, configured to control a converting circuit to transform an input voltage into a stable output voltage, is disclosed. The constant on time control circuit comprises a comparing circuit and a logic circuit. The comparing circuit compares a reference signal and a voltage signal indicative of the output voltage and accordingly outputs a compared result signal. The logic circuit periodically controls the converting circuit to perform voltage transformation and makes a time period of a duty cycle in every cycle being substantially constant. A start point in time of every cycle is determined according to the compared result signal. The comparing circuit comprises a differential pair, a base current source and an extra current source. The base current source provides a bias current to the differential pair. The extra current source provides a substantial ramp current to one channel in the differential pair.