Constant Sensing Current for MRAM Read Operations
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Solution Overview
Problem
Magnetoresistive random access memory (MRAM) sensing currents are unreliable due to variations with process-voltage-temperature (PVT) conditions, leading to unpredictable read operations and potential read disturbances, as existing solutions like bias generators consume additional power and are not effective in maintaining a constant sensing current.
Innovation Solution
A constant current source is generated using a load generator with a current mirror, which supplies a load voltage to both the resistive memory bit cell and reference cells, ensuring the sensing current remains invariant across PVT variations, thereby stabilizing the read operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the clamp voltage is reduced to keep sensing current low and avoid read disturbance, then read disturbance is avoided, but the sensing current becomes unreliable and may drop below threshold voltage due to PVT variations
Solution Approach 1:
The patent changes the control parameter from a fixed clamp voltage to a dynamically adjusted clamp voltage that compensates for PVT variations. The bias generator circuit monitors process, voltage, and temperature conditions and adjusts the clamp voltage accordingly to maintain constant sensing current, thus ensuring reliability while preventing read disturbance.
Solution Approach 2:
The patent implements a feedback mechanism where the bias generator circuit continuously monitors the sensing current and PVT conditions, then adjusts the clamp voltage in response to maintain the sensing current within the safe operating range. This closed-loop control ensures the sensing current remains reliable and avoids read disturbance despite PVT variations.
2Stability of the object's composition
If a bias generator is used to maintain constant sensing current, then sensing current stability is improved, but additional power is consumed
Solution Approach 1:
The bias generator circuit is designed to self-regulate the clamp voltage based on inherent circuit characteristics and PVT conditions, without requiring external control signals or additional power-intensive components. The circuit uses the available power efficiently to maintain stable sensing current through autonomous adjustment mechanisms.
3Object-affected harmful factors
If the sensing current is reduced to avoid read disturbance, then read disturbance is avoided, but the sensing margin decreases making read operations less reliable
Solution Approach 1:
The patent employs dynamic adjustment of the clamp voltage to maintain the sensing current at an optimal level that provides sufficient sensing margin while avoiding read disturbance. Rather than using a fixed low current, the system dynamically adapts the current level based on PVT conditions, ensuring both reliability and adequate measurement precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides a reliable and constant sensing current that improves read access pass yield and avoids read disturbances, ensuring accurate data reading across different PVT conditions without consuming excessive power.
Implementation Method 1
generating a load voltage from a current mirror which supplies a constant current that is invariant with process-voltage-temperature variations
Implementation Method 2
a sensing current is passed through the bit cell and a voltage V data developed across the resistance R data is then compared to a reference voltage V ref
Data Source
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AI summary
Systems and methods relate to providing a constant sensing current for reading a resistive memory element. A load voltage generator provides a load voltage based on a current mirror configured to supply a constant current that is invariant with process-voltage-temperature variations. A data voltage is generated based on the generated load voltage, by passing a sensing current mirrored from the constant current, through the resistive memory element. A reference voltage is generated, also based on the generated load voltage and by passing reference current mirrored from the constant current, through reference cells. A logical value stored in the resistive memory element is determined based on a comparison of the data voltage and the reference voltage, where the determination is free from effects of process-voltage-temperature variations.