Fin Structure Contact Blocking Layout With Air Gap Isolation
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Solution Overview
Problem
The challenge of forming reliable semiconductor devices at smaller sizes is exacerbated by the complexity of processing and manufacturing integrated circuits due to the continuous scaling-down process, which increases the difficulty of forming features at reduced sizes.
Innovation Solution
The formation of an air gap between the contact structure and the contact blocking structure, utilizing a lower dielectric constant material to reduce capacitance and boost circuit speed, is achieved through a series of etching and deposition processes, including the use of sacrificial layers and self-aligned patterning techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes are continuously decreased to increase functional density, then production efficiency is improved and costs are lowered, but the complexity of processing and manufacturing increases and reliability decreases
Solution Approach 1:
The patent segments the contact structure formation process by introducing an air gap that divides the contact structure from the underlying layers. This segmentation allows independent optimization of each component and simplifies the overall manufacturing process by reducing interdependencies between structure elements during fabrication
Solution Approach 2:
The patent extracts the dielectric material from between the contact structure and the underlying layers, creating an air gap. This removal eliminates the need to precisely control thin dielectric layers at scaled dimensions, thereby reducing processing complexity while maintaining electrical isolation
2Productivity
If feature sizes are continuously decreased to increase functional density, then production efficiency is improved and costs are lowered, but manufacturing precision becomes more difficult to achieve
Solution Approach 1:
The patent employs a sacrificial dielectric layer that is intentionally deposited and then completely removed to form the air gap. This disposable approach allows use of standard deposition processes without concern for maintaining ultra-thin layer precision, as the material is removed anyway, simplifying manufacturing while achieving precise air gap dimensions
Solution Approach 2:
The sacrificial dielectric layer is deposited beforehand with a controlled thickness that determines the final air gap dimension. This preliminary action allows precise air gap formation through a single deposition step followed by complete removal, avoiding the need for precise etching or thin-layer maintenance at later stages
3Ease of manufacture
If conventional dielectric materials are used between contact structures, then manufacturing is simpler, but parasitic capacitance increases and circuit speed decreases
Solution Approach 1:
The patent changes the dielectric constant parameter by replacing conventional dielectric material with air (dielectric constant ≈ 1). This parameter change dramatically reduces parasitic capacitance between contact structures, boosting circuit speed while the air gap formation process remains compatible with standard semiconductor manufacturing techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces parasitic capacitance between contact structures, enhancing circuit speed and improving device performance and yield by allowing for easier modification of the air gap width, thereby addressing the challenges of miniaturization in semiconductor fabrication.
Implementation Method 1
The formation of an air gap between the contact structure and the contact blocking structure, utilizing a lower dielectric constant material to reduce capacitance and boost circuit speed
Data Source
AI summary
A semiconductor structure includes a fin structure formed over a substrate. The structure also includes a gate structure formed across the fin structure. The structure also includes source/drain epitaxial structures formed on opposite sides of the gate structure. The structure also includes an inter-layer dielectric (ILD) structure formed over the gate structure. The structure also includes a contact blocking structure formed through the ILD structure over the source/drain epitaxial structure. A lower portion of the contact blocking structure is surrounded by an air gap, and the air gap is covered by a portion of the ILD structure.