Multi-Stage Contact Etching for Precise Epitaxy Landing

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Solution Overview

Problem

Challenges arise in the fabrication process of semiconductor devices due to the formation of conductive contacts in areas such as source and drain terminals of transistors, particularly as feature sizes decrease, necessitating improvements in the semiconductor fabrication process.

Innovation Solution

A multi-stage etching process is employed, including stages with isotropic and anisotropic etching, to form conductive contacts within semiconductor devices, utilizing a dielectric structure with selective etching to reduce hard mask loss and enhance precision.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conventional single-stage etching process is used to form conductive contacts, then the process is simple and fast, but hard mask loss occurs and precision deteriorates

Engineering Contradiction:
Improvecontact formation precisionVSAvoidetching process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The etching process is divided into multiple sequential stages: a first etching stage that removes a first portion of the interlayer dielectric, followed by a second etching stage that removes a second portion. This segmentation allows each stage to be optimized for specific requirements, reducing hard mask loss while maintaining precision in conductive contact formation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first etching stage performs preliminary removal of the interlayer dielectric before the second stage. This preliminary action creates favorable conditions for the subsequent etching stage, enabling better control over hard mask preservation and contact precision without requiring a completely complex new process.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If feature size is decreased to improve device density, then productivity increases, but manufacturing precision deteriorates

Engineering Contradiction:
Improvedevice densityVSAvoidcontact formation precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

Different etching conditions and parameters are applied at different stages of the process. The first etching stage uses parameters optimized for initial dielectric removal, while the second stage uses parameters optimized for precision contact formation. This local quality approach maintains precision even as overall feature sizes decrease for higher device density.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The multi-stage etching process reduces hard mask loss, allows for better epitaxy landing control, and increases the process window for forming conductive contacts, thereby improving fabrication efficiency and performance.

Implementation Method 1

performing a first stage of etching process to remove an upper portion of the first portion of ILD; performing a second stage of etching process to remove an isolation structure; performing a third stage of etching process to remove a middle portion of the first portion of ILD

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS12615824B2Multi-stage etching process for contact formation in a semiconductor device
Publication Date: 2026.04.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12615824B2 patent drawing
  • US12615824B2 patent drawing
  • US12615824B2 patent drawing

AI summary

A method of fabricating a semiconductor device is disclosed. The method includes separating an interlayer dielectric (ILD) into a plurality of portions. The plurality of portions of ILD, separated from each other along a first lateral direction and a second lateral direction, overlay a plurality of groups of epitaxial regions, respectively. The method includes performing an etching process to expose the plurality of groups of epitaxial regions, wherein the etching process comprises a plurality of stages, each of the stages comprising a respective etchant. The method includes forming a plurality of conductive contacts electrically coupled to the plurality of epitaxial regions, respectively.