Two-Stage Etching for Contact Holes in Semiconductor Devices
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Solution Overview
Problem
The formation of contact holes with different depths in semiconductor devices often results in residues of the insulating layer on the lower wiring layer, increasing resistance and the likelihood of cracks between wiring layers due to polymer accumulation during the etching process.
Innovation Solution
A method involving a two-stage etching process with varying etching rates and gas concentrations in an etching chamber, where the second etching process is performed at a higher rate than the first, and with increased bias power, to minimize residue accumulation and enhance adhesion between wiring layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single etching process is used to form contact holes of different depths, then the etching process can be completed in one step, but polymer accumulates on sidewalls and residues remain on the lower wiring layer, increasing resistance and causing adhesion problems
Solution Approach 1:
The etching process is divided into two distinct stages: a first etching process that etches to a first depth and a second etching process that etches to a second depth greater than the first depth. This segmentation allows each etching stage to be optimized independently, preventing polymer accumulation issues while achieving different contact hole depths without compromising manufacturing precision or increasing resistance
Solution Approach 2:
The etching process employs periodic action by alternating between two etching processes with different parameters. The first etching process operates under specific conditions to etch to the first depth, then the second etching process operates under different conditions to etch to the greater second depth. This periodic alternation prevents continuous polymer accumulation and enables precise control of contact hole depths while maintaining low resistance and good adhesion
2Productivity
If the etching process continues to etch deeper holes, then all contact holes can be completed, but polymer created by the reaction of the exposed lower wiring layer with etching gas accumulates on sidewalls, hindering further etching
Solution Approach 1:
The etching process is segmented into two distinct processes: a first etching process that etches to a first depth before significant polymer accumulation occurs, and a second etching process that continues etching to a greater second depth. This segmentation prevents the harmful polymer accumulation by resetting the etching conditions between stages, allowing complete formation of all contact holes without sidewall polymer hindrance
Solution Approach 2:
The method employs periodic action by alternating between two etching processes with different parameters. The first etching process operates under initial conditions, then the second etching process operates under modified conditions to continue etching deeper. This periodic alternation prevents continuous polymer accumulation on sidewalls while enabling completion of all contact holes to the required depths
3Device complexity
If residues of the insulating layer remain on the lower wiring layer, then the contact hole formation process is simpler, but the resistance of the contact hole increases and adhesion between wiring layers is suppressed
Solution Approach 1:
The etching process is segmented into two distinct stages: a first etching process that etches to a first depth and a second etching process that etches to a greater second depth. This segmentation ensures that residues of the insulating layer are effectively removed from the lower wiring layer, maintaining low contact hole resistance and good adhesion between wiring layers without significantly increasing process complexity
Solution Approach 2:
The method employs periodic action by alternating between two etching processes with different parameters. The first etching process operates under specific conditions, then the second etching process operates under different conditions to continue etching. This periodic alternation ensures thorough removal of insulating layer residues, maintaining low resistance and good adhesion while keeping the overall process complexity manageable
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the resistance of contact holes and minimizes the formation of cracks by efficiently removing insulating layer residues, thereby improving the connectivity and reliability of the wiring layers.
Implementation Method 1
Holes may be formed in the insulating layer by an etching process
Implementation Method 2
polymer created by the reaction of the exposed lower wiring layer with an etching gas may accumulate on sidewalls
Data Source
AI summary
A method of forming contact holes includes: forming a first conductive layer and a second conductive layer; forming an insulating layer on the first conductive layer and the second conductive layer; forming a photoresist pattern which exposes first and second etch surfaces of a top surface of the insulating layer; performing a first etching process on the insulating layer at a first etching rate; and performing a second etching process on the insulating layer at a second etching rate which is higher than the first etching rate, after a top surface of the first conductive layer is exposed through the insulating layer. The first etch surface is on the first conductive layer, the second etch surface is on the second conductive layer, and a distance between the second etch surface and the second conductive layer is greater than a distance between the first etch surface and the first conductive layer.