Contact Hole Fabrication Using Segmented Etching and High-k Dielectric Layers
Solution Overview
Problem
During the fabrication of contact holes in semiconductor integrated circuit devices, etching mask shifts occur, leading to undesired electrical connections due to contact holes penetrating unintended conductive layers.
Innovation Solution
A method involving a dry etching process followed by a wet etching process is used to form and widen contact holes, utilizing a stacked high-k dielectric layer and silicon oxide layers to control etching and prevent unwanted connections, with specific embodiments detailing different layer configurations and etching stop layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single etching process is used to form contact holes, then the manufacturing process is simple, but the contact hole position accuracy deteriorates due to mask shift
Solution Approach 1:
The patent divides the etching process into two distinct stages: a first etching process that forms contact holes through the inter-level insulating layer to a first depth, and a second etching process that continues etching to a second depth. This segmentation allows each etching step to be independently controlled with its own etching stop layer, thereby maintaining position accuracy despite mask shift while keeping the overall process manageable.
Solution Approach 2:
The patent applies a preliminary protective coating on the conductive layer before the etching process. This coating serves as an etching stop layer that prevents the contact hole from penetrating too deeply or shifting to unintended areas. By preparing this protective layer in advance, the system compensates for potential mask shift issues before they affect the final contact hole position.
2Manufacturing precision
If the contact hole is formed precisely on the conductive layer, then the electrical connection is accurate, but any mask shift causes the contact hole to penetrate unintended layers creating harmful connections
Solution Approach 1:
The patent introduces etching stop layers (protective coatings) on the conductive layer before the etching process begins. These stop layers act as a cushion or buffer that absorbs or compensates for mask shift variations. Even if the mask shifts during etching, the stop layer prevents the contact hole from penetrating into unintended conductive layers, thereby avoiding harmful electrical connections while maintaining precise alignment.
3Reliability
If the contact hole is widened to reduce resistance, then the electrical conductivity improves, but the contact hole may shift to unintended areas
Solution Approach 1:
The patent segments the etching process into two stages with different purposes: the first etching process creates the initial contact hole opening with position control, and the second etching process widens the contact hole to reduce resistance. Each stage has its own depth control mechanism (etching stop layers), which allows the hole to be widened without losing position control or shifting to unintended areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the likelihood of contact hole shift and undesired electrical connections, allowing for precise formation of contact holes with lower resistance and improved tolerance against etching process offsets.
Implementation Method 1
a dry etching process is performed to etch the first silicon oxide layer, the high-k dielectric layer, and the mask layer to expose the conductive line and form a contact hole
Implementation Method 2
a wet etching process is performed to etch the first silicon oxide layer, the third metal oxide layer and the second metal oxide layer to widen the contact hole
Data Source
AI summary
A method of fabricating a contact hole includes the steps of providing a conductive line, a mask layer covering and contacting the conductive line, a high-k dielectric layer covering and contacting the mask layer, and a first silicon oxide layer covering and contacting the high-k dielectric layer, wherein the high-k dielectric layer includes a first metal oxide layer, a second metal oxide layer and a third metal oxide layer stacked from bottom to top. A dry etching process is performed to etch the first silicon oxide layer, the high-k dielectric layer, and the mask layer to expose the conductive line and form a contact hole. Finally, a wet etching process is performed to etch the first silicon oxide layer, the third metal oxide layer and the second metal oxide layer to widen the contact hole, and the first metal oxide layer remains after the wet etching process.