Electro-optical Device Contact Hole Segmentation for Light Blocking
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Solution Overview
Problem
In electro-optical devices with a semiconductor layer extending along a scanning line, light incident from the data line-side source drain region cannot be effectively blocked from entering the pixel electrode-side source drain region, leading to optical leakage currents and reduced transistor performance.
Innovation Solution
The electro-optical device incorporates a data line and scanning line with a semiconductor layer overlapping in a plan view, featuring a first and second interlayer insulating layer with specific contact holes that electrically connect the data line and scanning line to the transistor, including hole portions that extend along both directions to block light effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a contact hole is provided to electrically couple the data line and source drain region, then electrical connection is achieved, but capacitance element and light-blocking structures cannot be provided in the vicinity
Solution Approach 1:
The second contact hole is segmented into first hole portions and second hole portions that extend in different directions. The first hole portions extend in the second direction on both sides of the semiconductor layer while the second hole portions extend in the first direction, creating a segmented light-blocking structure that maintains electrical connectivity while preventing light incidence.
Solution Approach 2:
The contact hole structure transitions from a simple vertical hole to a multi-dimensional configuration with portions extending in both the first direction (intersecting direction) and the second direction (scanning line direction). This dimensional expansion enables the structure to serve dual functions: electrical connection and light blocking.
Data Source
AI summary
In an electro-optical device, a transistor includes a semiconductor layer extending in a second direction so as to overlap with a scanning line in plan view. A second contact hole for electrically connecting the scanning line with a gate electrode of the transistor is provided in a second interlayer insulating layer provided in a layer between the scanning line and the transistor. The second contact hole includes a first hole portion extending along the second direction on both sides of the semiconductor layer in plan view, and a second hole portion protruding from the first hole portion toward the semiconductor layer and extending along a first direction.