Semiconductor Contact Hole Etching With Single Resist Pattern
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Solution Overview
Problem
The existing method for forming contact holes in semiconductor devices requires forming resist twice, leading to increased manufacturing costs due to the differing thicknesses of the interlayer insulating film on the source region and polysilicon film.
Innovation Solution
A manufacturing method that forms first and second contact holes using a single resist application, employing specific etching steps to ensure the second contact hole does not penetrate the polysilicon film, thereby reducing the need for multiple resist applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If separate resist formation is performed for first contact hole and second contact hole, then contact holes can be formed with different depths, but manufacturing cost increases due to multiple resist applications
Solution Approach 1:
The etching process is segmented into multiple steps (first etching, second etching, third etching) with different etching conditions, allowing different contact holes to be formed to different depths while using a single resist pattern. This segmentation of the etching process enables precise depth control without requiring multiple resist applications.
Solution Approach 2:
The etching parameters (etching solution type, etching time, temperature) are changed between etching steps to achieve different etching rates and selectivities. By changing etching parameters rather than repeating resist formation, the patent achieves different contact hole depths while reducing manufacturing cost.
2Ease of manufacture
If simultaneous formation of first contact hole and second contact hole is performed, then manufacturing cost is reduced, but the second contact hole may penetrate the polysilicon film
Solution Approach 1:
The first contact hole is formed to its final depth in a preliminary etching step before the second contact hole is formed. This preliminary action ensures that the first contact hole reaches the channel region while the second contact hole is controlled to stop at the polysilicon film interface, preventing penetration.
Solution Approach 2:
The etching process is made dynamic by adjusting etching conditions at different stages. The etching solution type, temperature, and time are dynamically changed between steps to control the etching rate and selectivity, enabling precise depth control for both contact holes formed simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces manufacturing costs by minimizing the number of resist applications while ensuring the formation of functional contact holes without penetrating the polysilicon film.
Implementation Method 1
the interlayer insulating film is etched with the first resist as a mask until the first main surface is exposed. Consequently, the first contact hole is formed in the interlayer insulating film
Implementation Method 2
the upper surface of the interlayer insulating film is planarized by chemical mechanical polishing (CMP) or the like
Data Source
AI summary
A manufacturing method of a semiconductor device includes a step of preparing a semiconductor substrate having a first main surface and a second main surface, a step of forming a recess in the first main surface and embedding an insulating film in the recess, a step of forming a polysilicon film on the insulating film, a step of forming an interlayer insulating film on the first main surface so as to cover the insulating film and the polysilicon film, and a step of forming a first contact hole and a second contact hole. The semiconductor substrate has a first impurity diffusion region formed in the first main surface, and a second impurity diffusion region in contact with a portion of the first impurity diffusion region, the portion being closer to the second main surface.