Contact Opening Liner Structure for Sub-5 Nm Pattern Scaling
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Solution Overview
Problem
As semiconductor devices become smaller, forming accurate patterns in layers becomes increasingly difficult due to the limitations of current pattern transfer methods, which can lead to manufacturing defects and reduced functionality, especially for features like vias and conductive lines in interconnect structures.
Innovation Solution
A method involving the deposition of a dimension offset liner material (DOLM) in the openings of dielectric layers to adjust the dimensions of contact openings, allowing for the formation of smaller features than previously possible with standard lithography tools, compatible with photolithography, UV, and helium ion patterning processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If standard lithography tools are used to form patterns, then manufacturing process is simple, but manufacturing precision deteriorates for features smaller than current capabilities
Solution Approach 1:
The pattern transfer process is divided into multiple steps: first forming a mandrel pattern, then using it to define the final feature pattern through spacer formation. This segmentation allows each step to be optimized independently, achieving higher precision for sub-lithographic features while keeping individual process steps manageable
Solution Approach 2:
A mandrel structure is formed in advance before the actual feature pattern is created. This preliminary action provides a template that guides subsequent spacer deposition and pattern transfer, enabling precise feature formation that would be impossible with direct lithography alone
2Manufacturing precision
If feature dimensions are reduced to extend manufacturing capabilities, then manufacturing precision improves, but manufacturing defects increase
Solution Approach 1:
Spacer material acts as an intermediary between the lithographically-defined mandrel and the final feature pattern. This intermediary enables precise feature dimension control through conformal deposition and anisotropic etching, achieving sub-lithographic precision while maintaining process reliability through well-controlled material properties
Solution Approach 2:
The method changes the controlling parameter for feature dimension from direct lithographic resolution to spacer film thickness, which is controlled by highly precise atomic layer deposition. This parameter change enables feature dimensions below the lithographic resolution limit while maintaining tight dimensional control and reducing variability-induced defects
3Manufacturing precision
If advanced pattern transfer methods are used to form smaller features, then manufacturing precision improves, but device complexity increases
Solution Approach 1:
The spacer-based pattern transfer method serves multiple functions: it defines contact openings, sets precise dimensional tolerances, and creates self-aligned features. This multi-functionality reduces the need for additional alignment and patterning steps, offsetting the added complexity with process integration benefits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method extends the manufacturing process window, enabling the production of features as small as 5 nanometers, reducing defects, and ensuring semiconductor devices meet performance specifications, thereby improving manufacturing reliability and yield.
Implementation Method 1
A method involves depositing a dimension offset liner material (DOLM) in openings of dielectric layers
Data Source
AI summary
A device which includes a conductive element at least partially in a substrate; a dielectric material over the conductive element; a contact electrically connecting to the conductive element; and a dielectric liner between the contact and the dielectric material, wherein the dielectric liner has a liner thickness of not less than 0.5 nanometers (nm) and not greater than 10 nm.