Contact Pad Structure for 3D NAND Etching Control

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Solution Overview

Problem

The high-aspect-ratio etching process in manufacturing 3D NAND flash memory devices faces challenges in forming contact holes, as over-etching can lead to bridging between word lines and under-etching can result in failure to create a word line contact, especially with increasing layers.

Innovation Solution

A semiconductor device with a contact pad configuration is developed, featuring a staircase structure with alternating insulating and conductive layers, where a contact pad is formed between insulating and conductive portions, allowing for precise electrical coupling of contact structures with word lines through a wet etching process, ensuring proper connection even when the contact structure extends through the stack.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high-aspect-ratio etching is used to form contact holes in 3D NAND devices, then memory density and layer count can be increased, but over-etching causes bridging between word lines and under-etching causes failure to create proper word line contacts

Engineering Contradiction:
Improvememory densityVSAvoidcontact hole depth control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

A contact pad structure is formed preliminarily before the final contact hole etching process. The contact pad includes a conductive portion extending into the contact hole and an insulating portion covering the conductive portion, creating a predefined structure that guides the etching process and prevents both over-etching and under-etching issues

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The contact pad structure serves as an intermediary element between the contact hole etching process and the word line connection. The insulating portion of the contact pad acts as a mediator that protects against bridging while the conductive portion ensures proper electrical connection, resolving the precision control issue

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If the number of layers in 3D NAND devices is increased, then memory capacity is improved, but the contact holes become deeper and more difficult to etch with precise depth control

Engineering Contradiction:
Improvenumber of layersVSAvoidetching process difficulty
Core Design Contradiction:
Quantity of substanceVSEase of operation

Solution Approach 1:

The contact pad is segmented into distinct functional portions: a conductive portion for electrical connection and an insulating portion for protection. This segmentation allows each portion to perform its specific function independently, simplifying the overall etching process despite increased layer count

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The contact pad structure adds a dimensional element by extending the conductive portion vertically into the contact hole while maintaining horizontal coverage with the insulating portion. This multi-dimensional structure simplifies the etching operation by providing clear etch stop references

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables reliable and precise formation of contact pads, preventing short-circuiting and ensuring successful word line connections, thereby improving the high-aspect-ratio etching process for 3D NAND devices.

Implementation Method 1

allowing for precise electrical coupling of contact structures with word lines through a wet etching process

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS20210384219A1Contact pad structure and method of forming the same
Publication Date: 2021.12.09 YANGTZE MEMORY TECH CO LTD
  • US20210384219A1 patent drawing
  • US20210384219A1 patent drawing
  • US20210384219A1 patent drawing

AI summary

Aspects of the disclosure provide a semiconductor device and a method for fabricating the same. The method for fabricating the semiconductor device can include forming a stack of alternating first insulating layers and first sacrificial layers over a semiconductor substrate, and forming a staircase in the stack having a plurality of steps, with at least a first step of the staircase including a first sacrificial layer of the first sacrificial layers over a first insulating layer of the first insulating layers. Further, the method can include forming a recess in the first sacrificial layer, forming a second sacrificial layer in the recess, and replacing a portion of the first sacrificial layer and the second sacrificial layer with a conductive material that forms a contact pad.