Air Spacer Isolation Around Contact Plugs for Lower Parasitic Capacitance
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Solution Overview
Problem
The scaling down of semiconductor devices has led to challenges such as increased parasitic capacitance between contact plugs and adjacent conductive features, which affects the performance and efficiency of integrated circuits.
Innovation Solution
The formation of an air spacer around the contact plug is achieved by depositing a sacrificial silicon layer, followed by an isolation layer, anisotropic etching, and subsequent removal of the silicon layer to create a gap, reducing parasitic capacitance through controlled etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If device geometry is scaled down to increase functional density, then production efficiency increases and costs decrease, but parasitic capacitance between contact plugs and adjacent conductive features increases
Solution Approach 1:
An air spacer is introduced as an intermediary structure between the contact plug and adjacent conductive features. The air spacer acts as a dielectric mediator that reduces parasitic capacitance by providing electrical isolation while maintaining the scaled-down geometry benefits for production efficiency
Solution Approach 2:
The patent extracts and removes a sacrificial silicon layer to create an air gap/spacer between the contact plug and surrounding structures. By taking out this intermediate material layer, the design achieves reduced parasitic capacitance while maintaining compact device geometry
2Object-affected harmful factors
If sacrificial silicon layer is deposited and then removed to form air spacer, then parasitic capacitance is reduced, but manufacturing process complexity increases
Solution Approach 1:
The sacrificial silicon layer is deposited in advance during the manufacturing process, before the final device structure is complete. This preliminary action allows the air spacer to be formed automatically when the sacrificial layer is removed, reducing parasitic capacitance without requiring complex post-processing steps
Solution Approach 2:
The sacrificial silicon layer serves dual purposes: it acts as a placeholder during manufacturing and then automatically creates the air spacer structure when removed. The structure essentially creates itself through the removal process, reducing the need for additional complex manufacturing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The air spacer effectively reduces parasitic capacitance, enhancing the performance and efficiency of semiconductor devices by minimizing electrical interference.
Implementation Method 1
anisotropic etching, and subsequent removal of the silicon layer to create a gap
Data Source
AI summary
A method includes forming an opening in a first dielectric layer. A region underlying the first dielectric layer is exposed to the opening. The method further includes depositing a dummy silicon layer extending into the opening, and depositing an isolation layer. The isolation layer and the dummy layer include a dummy silicon ring and an isolation ring, respectively, in the opening. The opening is filled with a metallic region, and the metal region is encircled by the isolation ring. The dummy silicon layer is etched to form an air spacer. A second dielectric layer is formed to seal the air spacer.