Contact Plug Anchoring With Bottom Etch Recess for CMP Reliability
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Solution Overview
Problem
Conventional middle-end-of-the-line (MEOL) contact formation in semiconductor devices often results in high resistance due to poor bonding between the plug fill layer and the underlying metal layer, leading to separation during chemical mechanical polishing (CMP) processes, which is costly and inefficient.
Innovation Solution
A method involving the formation of an oxide layer on electrical connections within a semiconductor device structure using oxidizing plasma, followed by an etch process to create an etch recess that anchors the metal plug, preventing separation during CMP by ensuring strong adhesion to the dielectric layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional MEOL contact formation is used to fill features with conductive material, then electrical connections are formed between layers, but poor bonding between the plug fill layer and underlying metal layer causes separation during CMP process
Solution Approach 1:
The patent applies preliminary action by forming an etch recess into the underlying metal layer before depositing the plug fill material. This pre-prepared recess structure provides immediate mechanical interlocking capability, ensuring strong bonding from the outset rather than relying on subsequent processes to create adhesion.
Solution Approach 2:
The patent segments the contact structure into distinct components: the underlying metal layer with an etch recess, and the plug fill layer deposited within that recess. This segmentation creates a mechanical interlock where the plug fill material physically anchors into the recessed portion of the metal layer, preventing separation during CMP.
2Reliability
If plasma enhancement or PVD processes are used to improve bonding between layers, then adhesion is enhanced, but throughput decreases and cost increases
Solution Approach 1:
The patent extracts the bonding enhancement mechanism from complex plasma or PVD processes and replaces it with a simpler etch recess structure. By removing the need for expensive and time-consuming plasma enhancement steps, the solution maintains strong bonding while improving throughput and reducing manufacturing cost.
Solution Approach 2:
The patent uses a simple etch recess structure that can be quickly formed and filled, replacing the need for expensive, time-consuming plasma enhancement processes. This disposable-like approach to creating adhesion (through a simple etch step) is much more efficient than maintaining complex plasma processes.
3Manufacturing precision
If plug fill layer is deposited to fill the feature, then electrical connection is formed, but overburden is formed on field region requiring CMP removal
Solution Approach 1:
The patent applies local quality by creating an etch recess specifically at the contact location where the plug fill material needs to anchor. This localized structural modification provides precise control over where the material is deposited and retained, reducing unnecessary overburden formation in surrounding field regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively anchors the metal plug, preventing separation during CMP and ensuring reliable, low-resistance connections between layers, thereby improving the overall performance of semiconductor structures.
Implementation Method 1
exposing a semiconductor device structure to an oxidizing plasma to form an oxide layer on at least one electrical connection
Implementation Method 2
performing an etch process to remove the oxide layer and form an etch recess between a portion of the electrical connection and the dielectric layer
Data Source
AI summary
Embodiments herein relate to a method, semiconductor device structures, and multi-chamber processing system for exposing a semiconductor device structure to an oxidizing plasma to form an oxide layer on at least one electrical connection formed in at least one feature formed within a dielectric layer of the semiconductor device structure, performing an etch process to remove the oxide layer and form an etch recess between a portion of the electrical connection and the dielectric layer At least a portion of the etch recess extends underneath at least a portion of the dielectric layer, and filling the at least one feature and the etch recess with a metal material.