Contact Plug VC Inspection via Bulk Silicon Substrate

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Solution Overview

Problem

In semiconductor devices with SOI substrates, the buried oxide film electrically insulates contact plugs from the support substrate, leading to reduced electron flow and difficulty in distinguishing normal from abnormal contact plugs during VC inspection, resulting in reduced reliability.

Innovation Solution

A semiconductor device is fabricated with SRAM structures on both SOI and bulk silicon substrates, where the SRAM on the bulk silicon substrate serves as a TEG for VC inspection, allowing for effective detection of connection defects by varying electron flow and light emission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a contact plug is connected to an upper surface of the SOI substrate, then the contact plug structure is formed, but the buried oxide film electrically insulates the contact plug from the support substrate, reducing electron flow and preventing light emission during VC inspection

Engineering Contradiction:
Improvecontact plug connection reliabilityVSAvoidVC inspection detection accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent introduces a bulk silicon substrate as an intermediary layer between the SOI substrate and the support substrate. The contact plug penetrates through the SOI substrate and forms a contact with the bulk silicon substrate, which serves as a mediator to provide both electrical connection (bypassing the insulating BOX layer) and mechanical support, enabling light emission during VC inspection while maintaining contact plug reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extends the contact plug structure into a third dimension by making it penetrate through the entire SOI substrate thickness. Instead of forming the contact plug only at the upper surface, it is extended downward to reach the bulk silicon substrate, creating a through-contact structure that establishes electrical continuity across the insulating BOX layer via the conductive bulk substrate

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the VC inspection is performed for the contact plug on the SOI substrate, then the inspection process is executed, but the normal contact plug and the abnormal contact plug cannot be distinguished from each other due to reduced electron flow

Engineering Contradiction:
Improveinspection process efficiencyVSAvoiddefect detection precision
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent utilizes light emission (visual contrast change) as an indicator of proper contact plug formation. During VC inspection, correctly formed contact plugs that establish electrical connection with the bulk silicon substrate emit light, while defective contact plugs do not emit light, creating a clear visual distinction between normal and abnormal contact plugs that enables accurate defect detection

Inventive Principle:
Principle #32Color changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of semiconductor devices by enabling accurate detection of contact plug defects through increased electron flow and improved light emission contrast during VC inspection.

Implementation Method 1

When irradiated with the electron ray (electron beam) for the VC inspection, electrons in the semiconductor substrate flow through a correctly-formed contact plug, and therefore, light emission can be verified.

Methodology Applied
Scientific EffectCathodoluminescence: Cathodoluminescence

Data Source

PatentUS10103075B2Semiconductor device and manufacturing method thereof
Publication Date: 2018.10.16 RENESAS ELECTRONICS CORP
  • US10103075B2 patent drawing
  • US10103075B2 patent drawing
  • US10103075B2 patent drawing

AI summary

When VC inspection for a TEG is performed, it is easily detected whether any failure of a contact plug occurs or not by increasing an emission intensity of a contact plug, so that reliability of a semiconductor device is improved. An element structure of an SRAM is formed on an SOI substrate in a chip region. Also, in a TEG region, an element structure of an SRAM in which a contact plug is connected to a semiconductor substrate is formed on the semiconductor substrate exposed from an SOI layer and a BOX film as a TEG used for the VC inspection.