Semiconductor Contact Plug Structure With Low-Temperature Annealing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor manufacturing processes face challenges in reducing contact resistance and achieving desired electrical performance due to difficulties in forming titanium silicide of the C54 crystal phase, which requires high-cost laser annealing and results in high contact resistance.

Innovation Solution

A method involving forming a dielectric layer, an opening, a material film on the substrate and sidewalls, a blocking film, and a conductive-material film, followed by an annealing process to form a contact layer with a low annealing temperature, allowing direct contact between the conductive-material film, material film, and substrate, and planarizing to create a blocking layer and plug, reducing contact resistance and preventing ion diffusion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a metal layer is deposited on the bottom and sidewall surfaces of the opening and rapid annealing is performed to form metal silicide, then contact resistance is reduced, but the process complexity and cost increase due to the need for laser annealing to form C54 crystal phase

Engineering Contradiction:
Improvecontact resistanceVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the annealing temperature parameter from high-temperature laser annealing to low-temperature annealing (400-450°C), which allows formation of the desired metal silicide contact layer without requiring complex laser annealing equipment or processes, thereby reducing process complexity while maintaining low contact resistance

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a sacrificial oxide layer that is intentionally formed and then removed to enable direct contact between the conductive material and substrate. This disposable sacrificial layer simplifies the overall process by eliminating the need for complex laser annealing, achieving low contact resistance through a simpler, more cost-effective approach

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Reliability

If high-temperature laser annealing is performed to form titanium silicide of C54 crystal phase, then contact resistance is reduced, but the risk of damage to semiconductor structures increases

Engineering Contradiction:
Improvecontact resistanceVSAvoiddamage to semiconductor structures
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent fundamentally changes the annealing temperature parameter from high-temperature laser annealing to low-temperature annealing in the range of 400-450°C. This parameter change achieves the desired metal silicide formation and low contact resistance while eliminating the harmful effects of high-temperature damage to other semiconductor structures

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces a sacrificial oxide layer as an intermediary that facilitates the formation of direct contact between conductive material and substrate. This intermediary approach allows low-temperature processing while achieving the same electrical contact quality that previously required high-temperature laser annealing, thus preventing thermal damage

Inventive Principle:
Principle #24Intermediary (Mediator)

3Object-generated harmful factors

If blocking film is formed on material film, then ion diffusion is prevented, but contact resistance increases due to additional interface layers

Engineering Contradiction:
Improveion diffusion preventionVSAvoidcontact resistance
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The patent performs preliminary action by forming a sacrificial oxide layer before depositing the blocking film. This sacrificial layer is later removed to create direct contact between conductive material and substrate, eliminating unnecessary interface layers that would increase contact resistance, while the blocking film is strategically positioned to prevent ion diffusion only where needed

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the blocking function by using a sacrificial oxide layer for initial isolation during fabrication, then removing it to allow direct contact for low resistance, while retaining blocking film only on sidewalls where ion diffusion prevention is needed. This segmentation optimizes both contact resistance and ion diffusion prevention

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method achieves low contact resistance, reduces process costs, and prevents damage to semiconductor structures by using a lower annealing temperature, while improving the overall performance of the semiconductor structure.

Implementation Method 1

performing an annealing process to form a contact layer at the bottom of the opening by making the substrate at the bottom of the opening, the material film at the bottom of the opening, and the conductive-material film formed on the surface of the material film react with each other

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS11784090B2Semiconductor structure
Publication Date: 2023.10.10 SEMICON MFG INT (SHANGHAI) CORP
  • US11784090B2 patent drawing
  • US11784090B2 patent drawing
  • US11784090B2 patent drawing

AI summary

The semiconductor structure includes a substrate; a dielectric layer formed on the substrate; an opening, formed through the dielectric layer; a contact layer formed at bottom of the opening; a blocking layer formed on a sidewall surface of the opening; and a plug formed in the opening. The plug is formed on a sidewall surface of the blocking layer and in contact with the contact layer.