Backside Contact Plug Layout With Nitride Cap Against Metal Diffusion
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Solution Overview
Problem
The scaling down of semiconductor manufacturing processes introduces increased complexity and challenges in maintaining the reliability and performance of semiconductor devices, particularly due to diffusion issues between conductive vias and traces in backside interconnects.
Innovation Solution
Incorporating a nitride capping layer between conductive vias and traces in backside interconnects to prevent diffusion of metal atoms, enhancing the reliability and performance of semiconductor devices by using gate-all-around transistor structures and advanced patterning techniques such as self-aligned double-patterning processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If scaling down process is used to increase functional density, then productivity is improved, but manufacturing precision deteriorates due to increased complexity
Solution Approach 1:
The patent segments the interconnect structure into multiple components: conductive via, nitride capping layer, and conductive trace. This segmentation allows each component to be optimized independently, with the nitride layer specifically addressing diffusion issues at the interface between metal components, thereby maintaining manufacturing precision during scaling.
Solution Approach 2:
The nitride capping layer acts as an intermediary barrier between the conductive via and conductive trace. This intermediate layer prevents direct contact and diffusion between metal atoms while ensuring electrical connectivity, solving the precision issues that arise from scaling down interconnect dimensions.
2Area of stationary object
If geometry size is decreased to increase functional density, then area is reduced, but reliability deteriorates due to diffusion issues between conductive vias and traces
Solution Approach 1:
The nitride capping layer serves as a diffusion barrier intermediary between the conductive via and conductive trace. By placing this intermediate layer at the interface, the patent prevents metal atom diffusion that would otherwise occur when geometry dimensions are reduced, thereby maintaining reliability in smaller geometries.
Solution Approach 2:
The patent uses a composite interconnect structure combining different materials: conductive metal (via and trace) and nitride material (capping layer). This composite approach leverages the electrical conductivity of metals and the diffusion barrier properties of nitride, ensuring reliability in scaled-down geometries.
3Reliability
If nitride capping layer is added to prevent diffusion, then reliability is improved, but device complexity increases
Solution Approach 1:
The nitride capping layer is applied locally only at critical interfaces where diffusion occurs (between conductive via and trace), rather than throughout the entire device. This localized application maintains reliability while minimizing the increase in overall device complexity.
Solution Approach 2:
The nitride capping layer is formed in advance during the interconnect fabrication process, before potential diffusion issues can arise. This preliminary protective action prevents reliability problems without requiring complex additional processing steps later in manufacturing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of a nitride capping layer and advanced patterning techniques improves the reliability and performance of semiconductor devices by minimizing diffusion and ensuring consistent electrical connectivity.
Implementation Method 1
Incorporating a nitride capping layer between conductive vias and traces in backside interconnects to prevent diffusion of metal atoms
Data Source
AI summary
A semiconductor device includes two source/drain features, a gate structure, a first contact plug, a second contact plug, a conductive line, and a nitride capping layer. The two source/drain features are laterally arranged to each other. The one or more channel layers connects the two source/drain features. The gate structure engages the one or more channel layers and interposes the two source/drain features. The first contact plug extends from above a first source/drain feature of the two source/drain features to the first source/drain feature. The second contact plug extends from below a second source/drain feature of the two source/drain features to the second source/drain feature. The conductive line is disposed underneath the second contact plug and electrically coupled to the second contact plug. The nitride capping layer is disposed between the second contact plug and the conductive line.