Self-Aligned Contact Plug Spacer Structure for Leakage Prevention
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Solution Overview
Problem
The increased integration level of semiconductor devices makes it challenging to maintain sufficient process margin when forming contact pads, leading to potential current leakage due to the exposure of titanium silicide layers to etchants during the SAC pad forming process.
Innovation Solution
The method involves forming contact plugs with a height difference and using spacers to create a groove that reduces the cross-sectional width of the second contact plug adjacent to the third contact plug, thereby protecting the silicide layer from etchants and improving contact reliability by using polysilicon and metal layers like titanium and tungsten, and forming additional spacers to prevent etchant exposure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the integration level of semiconductor devices is increased, then the electrical insulation between metal lines becomes more critical for performance, but it becomes more difficult to provide sufficient process margin when forming contact pads
Solution Approach 1:
The patent applies preliminary action by forming a self-aligned contact pad structure before final contact hole formation. The SAC pad is created using the gate structure and spacers as alignment references, ensuring proper positioning is established in advance. This preliminary structuring provides built-in process margins that accommodate variations in subsequent etching and deposition steps, thereby resolving the contradiction between maintaining electrical insulation and providing sufficient process margin.
Solution Approach 2:
The patent employs self-service through self-aligned contact formation where the gate structure and spacers automatically define the contact pad position and dimensions. The etching process uses the gate and spacer structures as self-aligned masks, eliminating the need for separate photolithography alignment steps. This self-alignment mechanism inherently provides process margin by ensuring consistent positioning regardless of photolithography variations, thus maintaining both electrical insulation reliability and manufacturing precision.
2Manufacturing precision
If a photoresist mask with opening regions larger than desired openings is used as an etching mask, then sufficient process margin for photolithography is obtained, but the spacer may be excessively etched and the silicide layer exposed to etchants
Solution Approach 1:
The patent applies preliminary action by pre-forming the SAC pad structure with proper dimensions using self-alignment before the contact hole etching process. The gate and spacer structures are prepared in advance to serve as precise alignment references, allowing the use of larger photoresist openings while maintaining accurate contact pad positioning. This preliminary structuring prevents excessive spacer etching by establishing robust self-aligned boundaries before the contact hole formation step.
Solution Approach 2:
The patent implements beforehand cushioning by creating a self-aligned contact pad structure that provides a buffer zone against etching variations. The SAC pad structure, formed with precise self-alignment, acts as a protective reference that compensates for potential over-etching. This pre-established structure ensures that even if spacers are slightly over-etched, the critical silicide layer remains protected because the self-aligned boundaries were already properly defined, thus cushioning against reliability degradation.
3Ease of manufacture
If the spacer is excessively etched, then the silicide layer is exposed to etchants, but this leads to decomposition of the silicide layer and current leakage
Solution Approach 1:
The patent applies preliminary action by forming the SAC pad structure with precisely controlled dimensions before the contact hole etching process. The gate and spacer structures are prepared in advance to serve as robust self-aligned masks that define exact contact pad boundaries. This preliminary structuring ensures that the spacers maintain sufficient thickness and structural integrity during etching, preventing excessive etching that would expose the silicide layer, thus maintaining contact reliability while allowing straightforward etching processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces or prevents current leakage by enhancing the reliability of bit line contact plugs, ensuring stable electrical connections and improving the overall performance of semiconductor devices.
Implementation Method 1
the titanium in the barrier layer 32 naturally reacts with polysilicon in the second contact plug 30 to form a titanium silicide layer 32a at the interface between the second contact plug 30 and the barrier layer 32
Data Source
AI summary
Methods of manufacturing semiconductor devices are provided in which a first contact plug is formed on a first active region in a substrate and a second contact plug is formed on a second active region in the substrate. A height of an upper surface of the second contact plug from the substrate is greater than a height of an upper surface of the first contact plug from the substrate. A third contact plug is formed on the second contact plug. A first spacer is formed on a side surface of the third contact plug. A third interlayer insulation layer is formed that covers the third contact plug. The third interlayer insulation layer is patterned to form a third opening that exposes the first contact plug. A fourth contact plug is formed in the third opening that is electrically connected to the first contact plug.