Electrical Contact Profile Control for Low-Resistance Memory Structures
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Solution Overview
Problem
The scaling-down of semiconductor structures leads to issues with contact resistance and electron current transmission speed, particularly in electrical contacts of memory devices like DRAM, due to profile variations and seam/crack formation during the manufacturing process.
Innovation Solution
An electrical structure with a specific design of electrical contacts that includes a first and second insulation layer, where the difference in widths of through holes in these layers is controlled to less than 10%, and the use of ultra-dilute hydrofluoric acid (HF) for cleaning to form a straight sidewall profile, facilitating deposition and filling processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the dimensions of semiconductor structures are scaled down to meet application requirements, then device density and integration are improved, but contact resistance increases and electron current transmission speed decreases
Solution Approach 1:
The patent changes the geometric parameters of the electrical contact, specifically maintaining a consistent width throughout its length (within 10% variation) rather than allowing tapering. This parameter control ensures that as dimensions are scaled down, the contact maintains optimal electrical properties with reduced contact resistance and improved current transmission speed
2Ease of manufacture
If conventional manufacturing processes are used for electrical contacts, then manufacturing simplicity is maintained, but profile variations and seam/crack formation occur
Solution Approach 1:
The patent applies preliminary actions during the manufacturing process, including surface treatment of the substrate before contact formation and controlled deposition conditions. These preliminary steps ensure that the electrical contact forms with a uniform profile from the beginning, preventing seam and crack formation while maintaining manufacturing feasibility
Solution Approach 2:
The patent modifies manufacturing parameters such as deposition conditions and surface treatment parameters to achieve uniform contact profile. By controlling these parameters, the process maintains simplicity while achieving high manufacturing precision with less than 10% width variation throughout the contact structure
3Ease of manufacture
If the width of electrical contact varies significantly, then manufacturing tolerance is easier to achieve, but contact resistance increases and current transmission speed decreases
Solution Approach 1:
The patent establishes a specific parameter range for contact width variation (less than 10% from the average width) that balances manufacturing tolerance with electrical performance. This controlled parameter range ensures sufficient tolerance for manufacturing while maintaining optimal electron current transmission speed and low contact resistance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The improved electrical contact profile reduces seam and crack formation, enhancing the quality and reducing resistance, resulting in a more reliable and efficient electrical connection.
Implementation Method 1
cleaning the exposed portion of the substrate through a cleaning agent so as to enlarge the first hole structure to become a second hole structure, wherein the cleaning agent includes water and hydrofluoric acid (HF)
Data Source
AI summary
An electrical structure and a method of manufacturing an electrical structure are provided. The electrical structure includes a substrate, a first insulation layer, a second insulation layer and an electrical contact. The first insulation layer and the second insulation layer are disposed over the substrate. The electrical contact extends through the first insulation layer and the second insulation layer. The electrical contact includes a first portion disposed in the first insulation layer and a second portion disposed in the second insulation layer. The first portion has a first width, and the second portion has a second width. A ratio of a difference between the first width and the second width to the first width is less than 10%.