Integrated Circuit Contact Seam Void Filling
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Solution Overview
Problem
As feature sizes in integrated circuits decrease, the aspect ratio of contacts and their openings increase, leading to challenges in filling the openings with conductive material, resulting in poor fill, seam voids, and higher resistance, as well as potential breakthrough of the metallization layer, which can impact the reliability of the ICs.
Innovation Solution
The method involves forming a conductive plug by depositing Ti and/or TiN to at least partially fill contact seam voids, which enhances the robustness of the contacts and prevents diffusion of the metallization layer, using a process that includes etching a contact opening in a dielectric layer, depositing a liner and conductive material, and planarizing to expose the seam voids, followed by depositing a second dielectric layer and forming a metallization trench.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes are decreased to increase integration density, then productivity and device capacity are improved, but the aspect ratio of contacts increases leading to poor fill quality and higher resistance
Solution Approach 1:
The patent performs preliminary planarization of the contact opening surfaces before filling with conductive material. This preliminary action removes irregularities and creates a flat surface that enables better subsequent filling, directly addressing the poor fill quality issue while maintaining the ability to use smaller feature sizes for higher integration density.
2Productivity
If feature sizes are decreased to increase integration density, then productivity is improved, but contact resistance increases due to seam voids in the conductive material
Solution Approach 1:
The planarization step is performed as a preliminary action before conductive material deposition. By flattening the contact opening surfaces beforehand, the subsequent filling process achieves better contact between conductive material layers, reducing seam voids and lowering contact resistance while enabling higher integration density through smaller feature sizes.
3Ease of manufacture
If conventional contact filling is used with high aspect ratio openings, then manufacturing simplicity is maintained, but metallization layer breakthrough occurs during electrical stressing
Solution Approach 1:
The patent introduces planarization as a preliminary step before conductive material filling. This creates a more uniform and controlled filling process that produces denser conductive material with fewer voids, preventing metallization layer breakthrough during electrical stressing while adding only one process step to the conventional method.
4Manufacturing precision
If contact openings are etched deeper to maintain aspect ratio with smaller features, then manufacturing complexity increases, but fill quality improves
Solution Approach 1:
Instead of etching deeper to improve fill quality, the patent applies planarization as a preliminary action on the existing contact opening surfaces. This approach improves fill quality by creating a flat surface for better material deposition while avoiding the increased complexity of deeper etching processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the robustness and reduces the resistance of the contacts by ensuring that the metallization layer does not break through the liner, maintaining the integrity of the contact-device region interface during electrical stressing.
Implementation Method 1
Ti and/or TiN is deposited to at least partially fill the contact seam void and define a conductive plug
Implementation Method 2
The conductive material is planarized to expose a contact seam void formed in the contact
Implementation Method 3
The second ILD layer is etched to form a sidewall that defines a metallization trench to expose the contact
Implementation Method 4
A liner is formed in the metallization trench overlying the sidewall and the contact
Implementation Method 5
A metallization layer is plated in the metallization trench overlying the liner
Data Source
AI summary
Integrated circuits and methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a conductive plug that at least partially fills a contact seam void. The contact seam void is formed in a contact that extends through an ILD layer of dielectric material overlying a device region. A metallization layer is deposited overlying the contact.