Self-Aligned Contact Separator Structure for Etch-Resistant Isolation
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Solution Overview
Problem
The etching resistance of silicon hard mask structures in self-aligned contact structures is insufficient, leading to incomplete separation of contact structures and potential short circuits during the formation of contact slot openings, which complicates the manufacturing process of semiconductor devices.
Innovation Solution
Employing high-etching resistance materials such as metal oxides or high-K materials as source/drain contact separators to ensure the integrity of contact structures during etching processes, reducing the risk of short circuits and improving separation efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If silicon hard mask structures are used as contact separators, then the manufacturing process is simplified with self-aligned contact structures, but the etching resistance is insufficient leading to incomplete separation and potential short circuits
Solution Approach 1:
The patent uses a composite material structure where a silicon-based hard mask is combined with a separate silicon nitride layer. The silicon hard mask provides the self-aligned patterning function, while the silicon nitride layer provides the necessary etching resistance to prevent short circuits during contact slot opening formation. This composite approach allows both the ease of self-aligned manufacturing and the reliability of complete contact separation.
2Reliability
If etching resistance is increased by using more resistant materials, then contact structure separation reliability improves, but the manufacturing complexity increases
Solution Approach 1:
The hard mask structure is segmented into two distinct functional layers: a silicon-based layer that provides self-aligned patterning capability and a silicon nitride layer that provides etching resistance. This segmentation allows each layer to be optimized for its specific function without requiring a complete redesign of the entire hard mask system, thus improving reliability while limiting the increase in manufacturing complexity to just one additional deposition step.
Data Source
AI summary
A semiconductor device and a method are provided. The semiconductor device includes gate structures extending on a substrate along a first direction and arranged in a second direction in parallel with one another, source and drain regions disposed in the substrate between the parallel gate structures, and dielectric structures disposed on the substrate and between the gate structures. The semiconductor device further includes an ILD layer disposed over the gate structures and the dielectric structures, contact structures disposed beside and between the parallel gate structures and separators embedded in the ILD layer. Each contact structure extends vertically through the ILD layer and the dielectric structures, and the separators are disposed above the gate structures and disposed beside the contact structures. Each contact structure extends along the first direction and extends between two adjacent separators, and each separator extending in the second direction overlaps at least two adjacent gate structures.