Context-Aware NVMe Packet Processing for Predictable Virtualized Latency
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Solution Overview
Problem
Current virtual switching technologies do not provide predictable NVMe access latency and memory bandwidth, leading to performance bottlenecks that hinder the full utilization of NVMe and NVMe over Fabric performance in virtual environments.
Innovation Solution
Implementing context-aware packet handling and virtual switching (VS) queues in the kernel space, using eBPF programs, to manage NVMe requests and optimize packet processing, including packet creation, ordering, and batching, with smart NICs offloading processor tasks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If virtual switching is implemented to improve distributed memory configuration and scalability, then system flexibility and cost are improved, but NVMe access latency becomes unpredictable and performance bottlenecks occur
Solution Approach 1:
The patent segments NVMe packet processing by creating separate virtual switch queues for different applications and workloads. This segmentation allows independent management of packet flows, enabling predictable latency for each application while maintaining overall system flexibility through virtual switching.
Solution Approach 2:
The patent implements preliminary actions by pre-configuring virtual switch queues and packet routing rules in the kernel space before NVMe operations begin. This pre-configuration ensures that packets are routed efficiently without requiring real-time decision-making, thereby reducing latency while preserving virtualization flexibility.
2Device complexity
If virtual switching is used to reduce system cost and improve scalability, then device complexity is reduced, but NVMe performance utilization is hindered
Solution Approach 1:
The patent introduces an intermediary layer in the kernel space that mediates between virtual switching and NVMe operations. This intermediary optimizes packet handling specifically for NVMe workloads, ensuring high performance utilization while maintaining the cost-effectiveness and scalability of virtual switching infrastructure.
Solution Approach 2:
The patent changes key processing parameters by implementing context-aware packet handling that adjusts routing and queue management based on application requirements. This dynamic parameter adjustment enables NVMe performance optimization without requiring complex hardware changes, maintaining cost efficiency.
3Speed
If context-aware packet handling is implemented to reduce latency, then NVMe access speed is improved, but processing complexity increases
Solution Approach 1:
The patent implements self-service mechanisms where the kernel space automatically manages packet routing and queue allocation based on application context. This automation reduces the need for complex external control systems while achieving low-latency NVMe access through intelligent, context-aware packet handling.
Data Source
AI summary
A node includes a shared memory for a distributed memory system on a network. A Non-Volatile Memory express (NVMe) request is received from a user space application executed by a Virtual Machine (VM) to send an NVMe command to a different node in the network. If a data size for the NVMe request exceeds a maximum segment size of an NVMe over Fabric (NVMe-oF) connection, packets are created to be sent for the NVMe request and an order is determined for sending the packets with one or more packets including data for the NVMe command being sent before a last packet that includes the NVMe command. In another aspect, Virtual Switching (VS) queues are created in a kernel space with each VS queue corresponding to a different respective user space application initiating requests and at least one user space application being executed by one or more other nodes.