Contiguous Via Plugs for Stacked Semiconductor Devices
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Solution Overview
Problem
Conventional through-silicon-via (TSV) plugs for die stacking in semiconductor devices lead to increased stack height, electrical signal integrity issues due to reflections and impedance, and inadequate heat dissipation, which complicates high-frequency operation and thermal management.
Innovation Solution
The implementation of contiguous via plugs through a die stack with beveled edges that reduce stack height, improve high-speed signaling performance, and enhance thermal dissipation using a self-aligning heat sink, while also accommodating a self-aligning test probe for functionality testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional through-silicon-via (TSV) plugs are used for die stacking, then interconnection between dies is achieved, but stack height increases and signal integrity deteriorates
Solution Approach 1:
The via structure is segmented into two parts: a first via extending through the first die and a second via extending through the second die, with the via fill material continuing substantially continuously between them. This segmentation allows each die to have its own via structure while maintaining electrical continuity, reducing the overall stack height compared to conventional TSV approaches that require separate via structures at each interface.
Solution Approach 2:
The via fill material of the first via and the second via merges to form a substantially continuous conductive path between the dies. This merging eliminates the need for separate via structures and interconnection bumps at the die interface, thereby reducing stack height while maintaining signal integrity through the continuous conductive path.
2Adaptability or versatility
If multiple die are stacked with interconnection at each wafer face, then device functionality is enhanced, but heat dissipation becomes inadequate
Solution Approach 1:
The via structure serves multiple functions: it provides electrical interconnection between dies and simultaneously acts as a thermal conduction path. The via fill material, being substantially continuous, conducts heat away from the stacked dies, addressing the heat dissipation issue while maintaining the enhanced device functionality achieved through stacking.
3Strength
If bump standoff height is used at each die-to-die transition, then mechanical interconnection is achieved, but stack height increases
Solution Approach 1:
The via fill material of adjacent vias merges to form a continuous structure that provides both mechanical support and electrical connection. This eliminates the need for separate bump standoff structures at each die interface, reducing stack height while maintaining mechanical interconnection strength through the continuous via fill material.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces stack height, improves high-speed signaling, and enhances thermal performance by effective heat dissipation from conductive planes, while allowing for efficient testing of stacked semiconductor die.
Implementation Method 1
enhance thermal dissipation using a self-aligning heat sink
Data Source
AI summary
A stacked semiconductor device includes a first and a second semiconductor device. A first major surface of each of the first and second devices which includes the active circuitry directly face each other. The first major surface of each of the devices includes a beveled edge on at least one edge, and a probe pad which extends onto the beveled edge. A first opening is located between the beveled edges of the first and second devices on a vertical side of the stacked semiconductor device.