Continuous-Time Sigma-Delta ADC Feedback for Metastability Shaping

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Solution Overview

Problem

Sigma-delta analog-to-digital converters (ADCs) face metastability errors due to non-ideal voltage outputs from quantizers, leading to inaccurate data processing, particularly at high sampling frequencies and small input signals, which degrades the stability and signal-to-quantization-noise ratio of the data processor.

Innovation Solution

A dual-feedback technique is employed with dual quantization and digital-to-analog converters (DACs) to compensate for delays in the feedback loops, reducing metastability errors by configuring additional quantizers and DACs to correct the output of the data processor, ensuring the total loop delay is within one sampling clock period.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the sampling frequency is increased to achieve high-speed data processing, then productivity is improved, but metastability errors increase and measurement precision deteriorates

Engineering Contradiction:
Improvedata processing speedVSAvoidoutput voltage accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the quantizer output is monitored and fed back to the adder. When metastability is detected (output voltage within threshold range), the system generates a correction signal that adjusts the quantizer input, forcing the output to the correct digital level. This closed-loop feedback resolves the contradiction by maintaining precision even at high sampling frequencies.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces an intermediary metastability detection and correction circuit between the quantizer and the output. This intermediary component detects metastable states and generates correction signals without affecting the main high-speed data path, thus maintaining both speed and precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If the quantizer gain is increased to improve measurement precision, then measurement precision is improved, but the stability of the sigma-delta modulator deteriorates

Engineering Contradiction:
Improvequantization accuracyVSAvoidmodulator stability
Core Design Contradiction:
Measurement precisionVSStability of the object's composition

Solution Approach 1:

The patent segments the quantization function into two parts: the main quantizer operating at normal gain for stability, and a separate metastability correction mechanism that provides additional precision when needed. This segmentation allows the system to maintain stability while achieving high precision through the correction path.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of continuously applying high quantizer gain, the system applies correction action only partially - specifically when metastability is detected. This partial action maintains modulator stability while providing precision enhancement exactly when required, avoiding the instability that would result from continuous high gain.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If additional quantizers and DACs are added to reduce metastability errors, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvemetastability error reductionVSAvoidfeedback loop structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the metastability correction function with the existing feedback loop structure. The correction path reuses components like the adder and feedback registers, combining multiple functions into a unified structure rather than adding completely separate correction circuitry. This reduces the complexity increase while maintaining precision improvement.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10763888B1Metastability shaping technique for continuous-time sigma-delta analog-to-digital converters
Publication Date: 2020.09.01 NXP BV
  • US10763888B1 patent drawing
  • US10763888B1 patent drawing
  • US10763888B1 patent drawing

AI summary

A method includes using a first feedback loop to compensate for a first excess loop delay (ELD) associated with a first quantizer and a first DAC of the first feedback loop. The first quantizer provides a first quantizer output to a second feedback loop. A second feedback loop compensates for a second ELD associated a second quantizer and a second DAC of the second feedback loop. The second quantizer reduces a metastability error associated with the first quantizer output.