Continuous-Time DFE Circuit for Low-Power Serial Equalization
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Solution Overview
Problem
Existing digital signal processing in high-speed serial communication channels faces challenges with poor signal-to-noise ratio (SNR) due to low bandwidth channels, leading to high power consumption and complex circuitry requirements for decision feedback equalization (DFE) systems, which are sensitive to disturbances and require high bandwidth.
Innovation Solution
Implementing a continuous-time Decision Feedback Equalizer (DFE) with continuous-time filters in a feedback loop, reducing power consumption and stabilizing the design by using Infinite Impulse Response (IIR) filters, which span multiple bit times and are programmable, adaptable, and less temperamental than discrete-time FIR-based systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete-time FIR filters are used in DFE, then the system can remove noise and distortion, but the circuit requires high bandwidth and consumes much power
Solution Approach 1:
The patent changes the fundamental parameter of filter operation from discrete-time to continuous-time domain. This parameter change allows the DFE to achieve the same noise and distortion removal functionality while operating at lower bandwidth requirements, directly reducing power consumption by 75% as stated in the technical effects
2Reliability
If discrete-time FIR filters are used in DFE, then the system can provide feedback equalization, but the circuitry becomes complex and requires high bandwidth
Solution Approach 1:
The patent transforms the operating domain parameter from discrete-time to continuous-time, fundamentally simplifying the circuitry. Continuous-time filters naturally handle the feedback equalization function without requiring complex digital signal processing circuits, reducing both circuitry complexity and bandwidth requirements while maintaining equalization performance
Solution Approach 2:
The patent substitutes complex digital mechanical/circuit systems with analog continuous-time filter circuits. By replacing discrete-time digital filter implementations with continuous-time analog filters, the system achieves the same equalization function with simpler circuitry and lower bandwidth requirements
3Productivity
If discrete-time DFE systems are used, then the system can process digital signals, but the operation is sensitive to disturbances and clock imperfections
Solution Approach 1:
The patent changes the time domain parameter from discrete to continuous, which inherently smooths the system's response to disturbances. Continuous-time filtering provides natural averaging and filtering of high-frequency noise and clock imperfections, reducing sensitivity while maintaining digital signal processing capability through the decision circuit
Data Source
AI summary
A continuous-time domain Decision Feedback Equalizer (DFE) for use in a serial communication channel comprises in one embodiment a summer, a decision circuit, a capture flip-flop (FF) and an N-th order active filter. The DFE and its active filter operate in continuous time to give improved performance over a discrete-time DFE. In one embodiment involving a first-order active filter, the capture FF is outside the continuous-time negative feedback loop of the DFE and involves a differential signal amplifier. In another embodiment, the capture flip-flop is inside the DFE loop, and in a third embodiment the decision circuit comprises a comparator.