Control Board Signal Buffering for Fast ALD Abnormality Detection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In plasma atomic layer deposition (ALD) apparatuses, the rapid plasma control cycle of 10 ms poses challenges for accurately determining device statuses and performing process control due to the 100 ms control cycle of input/output signals for sensors and RF power supplies, making it difficult to detect device abnormalities.

Innovation Solution

An abnormality detection system comprising a first controller for the substrate processing apparatus and a second controller for device control, which collects status signals over a predetermined time and sampling interval, allowing the first controller to determine device abnormalities by acquiring and analyzing these signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the control cycle for sensors and RF power supply is set to 100 ms, then the controller can operate with a standard polling interval, but it becomes difficult to accurately determine device statuses in plasma ALD apparatus where plasma control is performed in a 10 ms cycle

Engineering Contradiction:
Improveaccuracy of device status determinationVSAvoidcontrol cycle interval
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the control system into two segments: a first controller that performs fast 10 ms plasma control, and a second controller that performs comprehensive device status monitoring at 100 ms intervals. This segmentation allows each controller to operate at its optimal speed without compromising overall system accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second controller acts as an intermediary between the slow 100 ms polling system and the fast 10 ms plasma control process. It collects and accumulates status signals during the 100 ms cycle, then provides accurate device status information to the first controller, enabling precise determination despite the longer polling interval.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If status signals are collected at 100 ms intervals, then the controller can reduce processing load, but it cannot capture rapid status changes that occur during 10 ms plasma control cycles

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidstatus signal detection accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The second controller performs preliminary accumulation of status signals during the 100 ms control cycle. By pre-collecting and storing multiple status signals before the first controller needs them, the system prepares accurate device status information in advance, enabling precise determination without increasing real-time processing load.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The second controller continuously collects and accumulates status signals throughout the 100 ms cycle, ensuring that useful measurement data is captured continuously rather than intermittently. This continuous accumulation maintains measurement precision while allowing the first controller to operate efficiently at 10 ms intervals.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11873560B2Abnormality detection system and control board
Publication Date: 2024.01.16 TOKYO ELECTRON LTD
  • US11873560B2 patent drawing
  • US11873560B2 patent drawing
  • US11873560B2 patent drawing

AI summary

Provided is an abnormality detection system that includes a first controller configured to control a substrate processing apparatus and a second controller configured to control a device provided in the substrate processing apparatus according to an instruction from the first controller, thereby detecting an abnormality in the device. The second controller includes a storage unit configured to collect status signals for the device for a predetermined time and at a predetermined sampling interval in a predetermined cycle and accumulate the collected status signals for the device, and the first controller includes an abnormality determination unit configured to acquire the accumulated status signals for the device from the second controller at a time interval equal to or longer than the predetermined time, and determine presence or absence of an abnormality in the device.