Control Chip Memory Segmentation for Secure NPU Parameter Access

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Solution Overview

Problem

Neural-network model command streams and parameters are easily stolen and used by unauthorized users, compromising security.

Innovation Solution

A control chip with a storage circuit and neural-network processing unit (NPU) that includes a first region for command streams and a second region for parameters, where access authority is determined before reading the second region, ensuring only authorized access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If command streams and parameters are stored in the same memory region without access control, then the system operation is simple and fast, but security is compromised and data leakage occurs

Engineering Contradiction:
ImprovesecurityVSAvoidaccess control mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory is segmented into multiple regions: a first storage region for command streams and a second storage region for parameters. Access control is applied selectively to the second region, allowing security protection for parameters while maintaining simpler access for command streams in the first region.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An access control circuit is introduced as an intermediary between the NPU and the second storage region. This circuit verifies access authority before allowing parameter access, acting as a mediator that enforces security without requiring complex changes to the NPU architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If access authority verification is performed for every parameter access, then security is enhanced, but processing speed and efficiency are reduced

Engineering Contradiction:
Improvedata protectionVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By segmenting memory into first and second regions with different access control policies, the system applies security verification only where necessary (second region for parameters), while allowing fast unrestricted access to the first region containing command streams, thus balancing security and performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system applies access control partially - only to the second storage region containing parameters - rather than excessively applying it to all memory accesses. This selective approach protects sensitive data while minimizing impact on processing speed for command stream execution.

Inventive Principle:
Principle #16Partial or excessive action

3Adaptability or versatility

If all command streams can access all parameters, then the system is highly flexible and adaptable, but unauthorized access and data theft become possible

Engineering Contradiction:
Improvecommand stream flexibilityVSAvoidunauthorized access
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The storage circuit is segmented into a first region for command streams and a second region for parameters, with the second region protected by access control. This segmentation maintains system flexibility for legitimate command execution while preventing unauthorized access to parameters.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The access control circuit performs preliminary verification of access authority before allowing access to the second storage region. This preliminary anti-action prevents unauthorized command streams from accessing parameters, countering potential data theft before it can occur.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS20250217049A1Control chip and control method
Publication Date: 2025.07.03 NUVOTON
  • US20250217049A1 patent drawing
  • US20250217049A1 patent drawing
  • US20250217049A1 patent drawing

AI summary

A control chip is provided. A storage circuit includes a memory and a control circuit. The memory includes a first region and a second region. The first region stores command streams. The second region stores parameters. The control circuit accesses the memory. A neural-network processing unit (NPU) receives a destination block and performs a destination command stream corresponding to the destination block. In response to the destination command stream pointing to the second region, the control circuit or the NPU determines whether the destination command stream has access authority. In response to the destination command stream not having access authority, the control circuit does not read the second region. In response to the destination command stream having access authority, the control circuit reads the second region and provides the destination parameter stored in the second region to the NPU.