Control Chip Storage Access Verification for Neural Model Protection

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Solution Overview

Problem

Artificial neural network models are vulnerable to unauthorized access and theft, posing security risks in complex applications like facial recognition.

Innovation Solution

A control chip with a storage circuit that verifies access requests and provides learning data only to authorized circuits, using identification information to ensure secure access to learning procedures and data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the storage circuit stores learning procedure and learning data for neural network models, then the model can be executed and used for applications, but the model becomes vulnerable to unauthorized access and theft

Engineering Contradiction:
Improvemodel execution capabilityVSAvoidunauthorized access vulnerability
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The storage circuit is divided into a first storage region for storing the learning procedure and a second storage region for storing the learning data. The control circuit separately manages access to these regions, verifying access requests differently for each type of data, thereby segmenting the protection mechanism to address different security requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control circuit acts as an intermediary between processing circuits and the stored learning procedure/data. It receives access requests, verifies them against identification information, and selectively provides access based on verification results, thereby mediating and controlling access to prevent unauthorized use.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the storage circuit provides access to learning data to multiple processing circuits, then the system can process tasks in parallel, but the risk of model theft increases

Engineering Contradiction:
Improveparallel processing capabilityVSAvoidmodel security
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The control circuit decodes identification information from access requests and uses this feedback to determine whether to grant access. This feedback mechanism allows the system to dynamically control access based on the identity of the requesting circuit, enabling multiple authorized circuits to access data in parallel while blocking unauthorized access.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

Different access control policies are applied to different types of data: the learning procedure uses one verification method while the learning data uses another. This local differentiation allows the system to optimize both security and parallel processing capability by tailoring protection mechanisms to specific data types.

Inventive Principle:
Principle #3Local quality

3Reliability

If the storage circuit implements verification for all access requests, then security is improved, but the access speed and processing efficiency decrease

Engineering Contradiction:
Improveaccess securityVSAvoiddata access speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The system performs verification in advance by checking identification information before providing access to learning data. This preliminary action ensures that only authorized circuits can access the data, maintaining security while allowing rapid access once authorization is established.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250216829A1Control chip, storage circuit, and protection method
Publication Date: 2025.07.03 NUVOTON
  • US20250216829A1 patent drawing
  • US20250216829A1 patent drawing
  • US20250216829A1 patent drawing

AI summary

A control chip including a first processing circuit, a second processing circuit, and a storage circuit. The first processing circuit provides a learning procedure and learning data. The second processing circuit is configured to execute the learning procedure. The storage circuit stores the learning procedure and the learning data. In response to an access request pointing to the learning procedure, the storage circuit determines whether the access request is a correct access request. In response to the access request being a correct access request, the storage circuit provides the learning procedure to the second processing circuit. In response to the access request pointing to the learning data, the storage circuit determines whether the access request is provided from the second processing circuit. In response to the access request being provided from the second processing circuit, the storage circuit provides the learning data to the second processing circuit.