Control Circuit for ESD Protection in Deep Sub-Micron ICs

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Solution Overview

Problem

Integrated circuits (IC) are vulnerable to electrostatic discharge (ESD) damage, particularly in deep sub-micron semiconductor processes, as scaled-down devices and thinner gate oxides are susceptible to ESD stress, and existing ESD protection mechanisms may not effectively prevent damage when ESD voltage is insufficient to trigger protection elements.

Innovation Solution

A control circuit comprising N-type and P-type transistors is designed to provide an output voltage and is coupled with an ESD protection element, allowing the circuit to switch between normal and protection modes to prevent ESD damage by utilizing the ESD protection element to manage ESD current when voltage thresholds are exceeded.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ESD protection elements are designed to trigger at high voltage thresholds (2kV HBM or 200V Machine Mode), then the core circuit is protected from severe ESD damage, but the internal core circuits remain vulnerable when ESD voltage is insufficient to trigger the protection element

Engineering Contradiction:

ImproveESD protection effectivenessVSAvoidvulnerability to sub-threshold ESD damage

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The control circuit proactively monitors the voltage across the ESD protection element before ESD damage occurs. When the voltage exceeds a predetermined threshold indicating potential ESD event, the control circuit preemptively activates the switch transistor to create an alternative current path, preventing damage to the core circuit before it can occur

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The control circuit acts as an intermediary between the ESD protection element and the core circuit. It monitors the voltage across the ESD protection element and intervenes by activating the switch transistor to divert current, thereby protecting the core circuit from both triggered and non-triggered ESD events

Inventive Principle:

Principle #24Intermediary (Mediator)

2Strength

If the ESD protection element is designed with high breakdown voltage to protect against severe ESD, then it can withstand high voltage stress, but it fails to protect against lower voltage ESD events that cannot trigger the protection element

Engineering Contradiction:

ImproveESD protection element voltage withstand capabilityVSAvoidprotection coverage range

Core Design Contradiction:

StrengthVSReliability

Solution Approach 1:

The control circuit continuously monitors the voltage across the ESD protection element and uses this feedback information to determine when to activate the switch transistor. This feedback mechanism enables the system to respond to both high-voltage triggered events and lower-voltage non-triggered events, expanding the protection coverage range while maintaining high voltage withstand capability

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS10818653B2Control circuit and operating circuit utilizing the same

Publication Date: 2020.10.27 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION

AI summary

A control circuit providing an output voltage and including an N-type transistor, a first P-type transistor and a second P-type transistor is provided. The N-type transistor is coupled to a first power terminal. The first P-type transistor includes a first source, a first drain, a first gate and a first bulk. The first gate is coupled to a gate of the N-type transistor. The first bulk is coupled to the first source. The second P-type transistor includes a second source, a second drain, a second gate and a second bulk. The second source is coupled to a second power terminal. The second drain and the second bulk are coupled to the first bulk.