Control Circuitry for Solid-State Storage Peak Current Suppression
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Solution Overview
Problem
In solid-state data storage devices, high peak current levels negatively impact performance and efficiency, particularly during control line pre-charging, where control lines are charged selectively based on incoming data patterns, leading to current spikes that require trade-offs in performance to maintain peak current consumption within acceptable limits.
Innovation Solution
The implementation of a control circuitry that manages current consumption by charging unselected control lines with a regulated current during the first phase of pre-charging and an unregulated current during the second phase, based on bias variance states and bit-to-bit relationships, to dynamically control peak current levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If control lines are charged with unregulated current to reach inhibit voltage level, then pre-charging speed is improved, but peak current consumption increases
Solution Approach 1:
The pre-charging process is divided into two distinct phases: a first phase using regulated current to charge unselected control lines to a target voltage level, and a second phase using unregulated current to charge them to the inhibit voltage level. This segmentation allows the system to balance between speed and peak current consumption by controlling the charging current appropriately for each stage.
Solution Approach 2:
The system dynamically adjusts the charging current based on the charge state of control lines. The control circuitry transitions from regulated current in the first phase to unregulated current in the second phase, adapting the charging behavior to the specific needs of each pre-charging stage to optimize both speed and current consumption.
2Use of energy by moving object
If regulated current is used to charge unselected control lines, then peak current consumption is reduced, but pre-charging time increases
Solution Approach 1:
The pre-charging process is divided into two distinct phases: a first phase using regulated current to charge unselected control lines to a target voltage level, and a second phase using unregulated current to charge them to the inhibit voltage level. This segmentation allows the system to balance between speed and peak current consumption by controlling the charging current appropriately for each stage.
Solution Approach 2:
The charging process employs periodic action by alternating between regulated and unregulated current phases. The first phase uses regulated current for a controlled period to reach the target voltage level, then transitions to the second phase with unregulated current to complete the charging to inhibit voltage level, optimizing both time and current consumption.
3Productivity
If target voltage level is increased based on bias variance state, then charging efficiency is improved, but voltage control complexity increases
Solution Approach 1:
The system performs preliminary determination of the bias variance state before charging the control lines. Based on this predetermined state, the target voltage level is pre-calculated and set, allowing the charging process to proceed efficiently without real-time adjustments during the actual charging phase.
Solution Approach 2:
The system uses feedback from the bias variance state to dynamically adjust the target voltage level. The control circuitry monitors the charge states of control lines, calculates the bias variance state, and uses this information to determine the appropriate target voltage level for the first phase charging, optimizing charging efficiency while maintaining manageable control complexity.
Data Source
AI summary
An apparatus includes a plurality of solid-state storage elements, a plurality of control lines coupled to the plurality of solid-state storage elements, and control circuitry in communication with the plurality of control lines. The control circuitry is configured to during a first phase of a control line pre-charging stage, charge one or more unselected control lines of the plurality of control lines using a regulated charging current for a period of time based at least in part on a bias variance state associated with the plurality of control lines, and during a second phase of the control line pre-charging stage, charge the one or more unselected bit lines to an inhibit voltage level using an unregulated charging current.