Distributed Control Clock Sync for Cyclic Memory Consistency
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Solution Overview
Problem
In cyclic memory systems, differences in communication delay and jitter between controllers make it difficult to synchronize data across all nodes, limiting control performance due to varying start times for control applications.
Innovation Solution
Implementing a control system that allocates time slots on a network and synchronizes data writing and reading across nodes using TSN standardization, ensuring data is written and stored in a common area simultaneously across all nodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If cyclic memory system is used for data sharing between controllers, then communication load is reduced and data sharing is enabled, but data synchronization becomes difficult due to communication delay differences and jitter
Solution Approach 1:
The patent applies preliminary action by having controllers pre-synchronize their clocks before data exchange operations. The clock synchronization unit establishes a common time reference in advance, allowing all controllers to operate from a synchronized temporal baseline. This preliminary synchronization ensures that when cyclic memory data is exchanged, all controllers reference the same time stamps, eliminating synchronization issues caused by clock drift and communication delay variations.
2Loss of time
If time slot communication based on time division is introduced, then time determinism in communication delay is improved, but network complexity increases
Solution Approach 1:
The patent applies universality by implementing a standardized time synchronization protocol that can be applied across all controllers in the network regardless of their specific functions or positions. The clock synchronization mechanism serves multiple purposes: it provides time stamping for data exchange, enables deterministic communication scheduling, and coordinates cyclic memory updates. This multi-functional approach achieves time determinism without requiring separate specialized mechanisms for each controller.
Data Source
AI summary
In the conventional distributed control system, since each control device updates the data area at a timing when a control packet is received, in a case where there is a difference in communication delay between the control devices or in a case where the communication delay includes jitter, it is difficult to match the contents of data in all the control devices in a case of focusing on a certain moment during system operation. Therefore, depending on the start timing of a control application, the control application operates on the basis of different data between the control devices, thus limiting control performance improvement. Accordingly, time slots on the network are allocated according to the result of a calculation unit, and a cyclic memory synchronization update unit synchronizes the timing of reflecting data in the input/output and the cyclic memory and the timing of using data of a cyclic memory.