Control Core Calculation Core Architecture for OS Jitter Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Parallel computers face issues of OS jitter and cache pollution, leading to inefficiencies and increased development costs, particularly due to the need for specialized hardware and languages in accelerator-type computers and the overhead of virtualization.

Innovation Solution

An information processing apparatus with a control core running an OS and calculation cores that can start and halt processes under control, including exception detection, allowing for efficient execution of parallel programs without an OS on calculation nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If an OS is installed on calculation nodes in parallel computers, then system control and management are improved, but OS jitter and cache pollution occur leading to non-uniform execution speeds

Engineering Contradiction:
Improvesystem controlVSAvoidexecution speed uniformity
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The system is segmented into control nodes running full OS and calculation nodes running lightweight virtual machines. This segmentation allows control functions to be separated from computation functions, enabling the OS to run only where needed while calculation nodes maintain uniform execution speeds without OS overhead.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A lightweight virtual machine acts as an intermediary between the OS on control nodes and the calculation processes on calculation nodes. This intermediary provides necessary system control interfaces without introducing full OS overhead, thus maintaining execution speed uniformity while enabling system management.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If accelerator-type computers are used to avoid OS jitter, then execution speed is improved, but versatility is reduced due to lack of OS APIs

Engineering Contradiction:
Improveexecution speedVSAvoidAPI compatibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The lightweight virtual machine is designed to provide universal interfaces compatible with standard OS APIs while running on calculation nodes. This allows the same virtual machine environment to support multiple programming languages and existing programming assets, providing versatility without requiring specialized accelerator programming.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If virtualization is used to reduce development costs, then OS development overhead is reduced, but virtualization overhead remains and does not solve OS jitter problems

Engineering Contradiction:
Improvedevelopment costVSAvoidvirtualization overhead
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

Instead of using heavy full OS environments on calculation nodes, the system employs lightweight virtual machines that consume minimal resources. These lightweight VMs provide necessary system interfaces without the overhead of full OS virtualization, reducing both development costs and runtime overhead while eliminating OS jitter on calculation nodes.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS10241829B2Information processing device, information processing method, recording medium, calculation processing device, calculation processing method
Publication Date: 2019.03.26 NEC CORP
  • US10241829B2 patent drawing
  • US10241829B2 patent drawing
  • US10241829B2 patent drawing

AI summary

The present invention resolves the problems of OS jitter and cache pollution, as well as the loss of versatility and increases in development cost. An information processing apparatus includes a control core on which an operating system is installed, and at least one calculation core which is controlled by the control core and performs a predetermined calculation process. The control core includes calculation core control unit for instructing the calculation core in halting, to start the calculation process to be performed by calculation core. The calculation core includes calculation processing control unit for controlling the calculation core so as to start the calculation process in response to an instruction, provided by the calculation core control unit, about starting the calculation process, and exception detection unit for detecting a preset exception process occurring during execution of the calculation process and halting the calculation process in which the exception process has occurred.