Control Gate Driver Circuit for Split-Gate Memory Cells
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing control gate drivers for split gate memory cells face damage from high voltages required for various operations, leading to increased layout size and cost due to the need for isolated wells for each device.
Innovation Solution
A control gate driver circuit is designed with voltage supply switches that control voltage levels, preventing stress across junctions or oxides and allowing the full range of voltages, including high voltages, to be applied without damaging transistors, enabling consolidation into common wells for area efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high voltage is applied to the control gate for memory operations, then the desired operation (program/erase) is achieved, but the transistors in the control gate driver may be damaged
Solution Approach 1:
The patent introduces a voltage supply switch circuit as an intermediary between the high voltage source and the control gate driver transistors. This switch circuit controls the voltage levels applied to transistor gates, ensuring that transistors only experience voltage levels within their safe operating ranges while still enabling high voltage to be applied to the control gate when needed for memory operations.
2Reliability
If each device is placed into its own isolated well to prevent damage, then device reliability is improved, but the layout size and circuit area increase
Solution Approach 1:
The patent merges multiple devices into a common well structure by implementing a unified voltage supply switch circuit that serves multiple transistors. This consolidation eliminates the need for separate isolated wells for each device, reducing the overall layout area while maintaining reliable protection through centralized voltage control.
Data Source
AI summary
A circuit for driving a control gate of a split-gate nonvolatile memory cell may include a switched current source; a first transistor having a current electrode coupled to the switched current source and a control electrode coupled to a voltage source; a second transistor having a current electrode coupled to a second node of the switched current source, and a control electrode coupled to a third voltage source; a third transistor having a control electrode coupled to the second transistor, a current electrode coupled to the first transistor and a fourth switched voltage source; and a fourth transistor having a current electrode coupled to the first switched voltage source, a control electrode coupled to the switched current source, and a second current electrode coupled to the second transistor at a driver voltage node, wherein a voltage level at the driver voltage node is operable to drive the control gate.


