Control IC Clock Regeneration for DVB Video Stability
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Solution Overview
Problem
Digital Video Broadcasting (DVB) television receivers experience abnormal video output, such as mosaic phenomena, due to high-speed clock signals with fixed frequencies that are much higher than the data rate of the data signal, causing the Conditional Access Module (CAM) to operate abnormally.
Innovation Solution
A control Integrated Circuit (IC) with a clock control circuit that regenerates a reference clock signal to replace the high-speed clock signal generated by the demodulator, ensuring the CAM receives frames according to a corrected reference clock, thereby maintaining normal video output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a high-speed reference clock signal with fixed frequency is used from the demodulator, then the clock signal can be provided to the CAM, but the CAM operates abnormally causing mosaic phenomenon in video output
Solution Approach 1:
The patent changes the frequency parameter of the reference clock signal by regenerating it at a lower frequency that matches the data rate. The clock control circuit generates a new reference clock signal with frequency adapted to the actual data transmission rate, rather than using the high-speed fixed frequency clock from the demodulator, thereby resolving the mismatch causing CAM operation abnormalities.
Solution Approach 2:
The patent introduces a clock control circuit as an intermediary between the demodulator and the CAM. This intermediary component regenerates the reference clock signal at the appropriate frequency, mediating the clock signal transmission to ensure compatibility between the high-speed demodulator output and the CAM's data rate requirements.
2Productivity
If the reference clock signal frequency is much higher than the data rate, then clock signal can be generated, but it causes mismatch leading to abnormal CAM operation
Solution Approach 1:
The patent applies parameter changes by adjusting the frequency of the reference clock signal to match the CAM's data rate. The clock control circuit regenerates the clock signal with a frequency parameter that is adapted to the actual data transmission requirements, ensuring compatibility while maintaining efficient operation.
3Reliability
If a control IC is introduced to regenerate reference clock, then video output stability is improved, but device complexity increases
Solution Approach 1:
The patent merges the clock control circuit functionality into the existing control IC that already processes transport stream data. By integrating the reference clock regeneration function into the control IC rather than adding a separate dedicated clock generator, the patent improves video output stability while minimizing the increase in device complexity through functional consolidation.
Data Source
AI summary
A control integrated circuit (IC) for maintaining video output to a conditional access module (CAM) with aid of reference clock regeneration, an associated television receiver and an associated method are provided. The control IC may include an input control circuit, a frame processing circuit, a clock control circuit, and an output control circuit. The input control circuit receives a transport stream (TS) data signal from a demodulator circuit, the frame processing circuit performs frame processing operations on the TS data signal to prepare a plurality of frames, the clock control circuit generates a second reference clock signal according to the TS valid signal to be a replacement for a first reference clock signal, and the output control circuit outputs the plurality of frames to the CAM according to the second reference clock signal, to allow the CAM to perform conditional access (CA) control for the television receiver.