Multi-Core Control Program Autoparallelization

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Solution Overview

Problem

Control applications, such as PLCs, face challenges in reducing scan cycle time due to limitations in microprocessor performance, with multi-core processors not being automatically utilized effectively, and existing parallelization methods leading to load imbalances and performance degradation.

Innovation Solution

An autoparallelization technique that partitions control programs into pipeline stages by inserting data dependency delays, allowing scheduling across multiple cores without breaking data dependencies, thus reducing scan cycle time through efficient resource utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If multi-core processors are used to execute control programs, then execution speed can be improved, but the programs do not automatically take advantage of the increased computational resources due to lack of task-level parallelism exposure

Engineering Contradiction:
Improveexecution speedVSAvoidparallelism exposure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The control program is automatically segmented into multiple independent tasks that can be executed in parallel on different cores. The system analyzes the program structure and divides it into task units that maintain data independence, allowing simultaneous execution without requiring manual parallelism exposure by programmers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs self-service by automatically detecting and exploiting task-level parallelism within control programs without requiring programmer intervention. The autoparallelization technology autonomously analyzes program dependencies and generates parallel execution schedules, making multi-core processors productive without increasing user complexity.

Inventive Principle:
Principle #25Self-service

2Productivity

If data dependency analysis is used to find task-level parallelism for multi-core processors, then parallel execution can be achieved, but load-unbalanced tasks are created that provide marginal performance improvements or performance degradation

Engineering Contradiction:
Improveparallel execution capabilityVSAvoidload balance
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The system dynamically adjusts task allocation and scheduling to achieve load balance across multiple cores. Rather than creating static, unbalanced tasks, the autoparallelization technology continuously monitors and adjusts task distribution to optimize performance, ensuring that no single core becomes a bottleneck while maintaining parallel execution benefits.

Inventive Principle:
Principle #15Dynamics

3Loss of time

If the scan cycle time is reduced by optimizing the control program, then the number of total operations is reduced, but the response time for high-performance applications such as motion control remains insufficient

Engineering Contradiction:
Improvescan cycle timeVSAvoidresponse time
Core Design Contradiction:
Loss of timeVSSpeed

Solution Approach 1:

The system transitions from single-dimensional sequential execution to multi-dimensional parallel execution by utilizing multiple processor cores simultaneously. This dimensional change allows the control program to execute multiple operations concurrently, dramatically reducing both scan cycle time and response time for high-performance applications like motion control.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9727377B2Reducing the scan cycle time of control applications through multi-core execution of user programs
Publication Date: 2017.08.08 SIEMENS AG
  • US9727377B2 patent drawing
  • US9727377B2 patent drawing
  • US9727377B2 patent drawing

AI summary

A method for pipeline parallelizing a control program for multi-core execution includes using (12) data dependency analysis on a control program to identify tasks that can be performed in parallel, identifying (13) a largest task Tmax requiring the most execution time of the identified tasks, identifying (14) cut-points in the largest task Tmax where data dependency delays decouple the task, inserting (15) delayed data dependencies into cut-points of the largest task Tmax to create N pipeline sub-tasks, in which N is a number of cores available to a processor on which the control program will be executed, and scheduling (16) the tasks and pipeline sub-tasks to the available processor cores.