Control Voltage Generation Circuit for Non-Volatile Memory
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Solution Overview
Problem
Non-volatile memory devices with negative threshold voltage distributions face challenges in disconnecting word line voltages using conventional high-voltage transistors, as applying a voltage higher than ground voltage is insufficient to cut off voltages when threshold voltages are negative.
Innovation Solution
A control voltage generation circuit that includes a transferor, enabling voltage driver, and disabling voltage driver, utilizing high-voltage NMOS and PMOS transistors to generate control voltages for high-voltage transistors, allowing for electrical connection or disconnection of word lines based on enable signals, effectively managing positive, ground, and negative voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a voltage higher than ground voltage is applied to high-voltage transistors, then the transistors can be turned on, but the voltages cannot be cut off when threshold voltages are negative
Solution Approach 1:
The patent applies parameter changes by switching the control voltage level based on the threshold voltage distribution. When negative threshold voltage distribution is detected, the control voltage is changed to a negative level; when positive distribution is detected, the control voltage is changed to a positive level. This dynamic parameter adjustment allows the high-voltage transistors to reliably cut off voltages regardless of the threshold voltage distribution type.
Solution Approach 2:
The patent implements dynamics by making the control voltage generation adaptive and changeable based on operating conditions. The control voltage generation circuit dynamically selects between positive and negative voltage levels according to the threshold voltage distribution of memory cells, enabling the system to adapt to different operational states and maintain reliable voltage cutoff functionality.
2Ease of operation
If conventional high-voltage transistors are used with positive threshold voltage distribution, then voltage transfer and cutoff work correctly, but they fail to cutoff voltages when threshold voltage distribution becomes negative
Solution Approach 1:
The patent resolves this contradiction by changing the control voltage parameter based on the threshold voltage distribution type. The control voltage generation circuit monitors the distribution type and adjusts the control voltage level accordingly, maintaining both ease of operation and reliability across different operating conditions without requiring complex additional circuitry.
3Reliability
If negative voltage is applied to high-voltage transistors to cutoff voltages in negative mode, then voltage cutoff is achieved, but potential damage from negative voltage transfer must be prevented
Solution Approach 1:
The patent uses the control voltage generation circuit as an intermediary between the voltage transferor and the high-voltage transistors. This intermediary actively manages the voltage levels by generating appropriate control voltages (positive or negative) based on the threshold voltage distribution, enabling reliable voltage cutoff while preventing harmful negative voltage transfer to components that cannot tolerate it.
Solution Approach 2:
The patent applies preliminary anti-action by proactively generating the appropriate control voltage before voltage transfer occurs. The control voltage generation circuit prepares the correct voltage level (positive or negative) in advance based on the threshold voltage distribution type, preventing potential damage before it can occur by ensuring only compatible voltage levels are transferred.
Data Source
AI summary
A control voltage generation circuit for generating a control voltage for controlling a high-voltage transistor includes an input node configured to receive a first enable signal; an output node configured to generate the control voltage, a transferor configured to transfer a voltage of the input node to the output node in response to a transfer signal, an enabling voltage driver configured to drive the output node with a high voltage when the first enable signal is enabled, and a disabling voltage driver configured to drive the output node with a negative voltage when a second enable signal is enabled in a negative mode.


