Controllable Voltage Source for Shift Register Gate Driver

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Solution Overview

Problem

The reliability of TFT integrated gate driving circuits in narrow bezel displays is compromised due to the constant gate biasing method, which leads to rapid threshold voltage shifts in low-level-holding TFTs, resulting in reduced circuit lifespan and performance degradation over time.

Innovation Solution

A controllable voltage source and shift register unit are introduced, which adjust the voltage supply to low-level-holding devices by changing the duty cycle and amplitude of clock signals, thereby compensating for threshold voltage shifts and prolonging the circuit's lifespan.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If constant gate biasing method is used for low-level-holding TFTs, then the circuit structure is simple and easy to manufacture, but the threshold voltage shifts rapidly and circuit reliability deteriorates

Engineering Contradiction:
Improvecircuit structure simplicityVSAvoidcircuit reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies dynamics principle by transforming the constant gate biasing method into a dynamic biasing method. The gate voltage of low-level-holding TFTs is no longer fixed but varies over time, switching between different voltage levels based on the operating state of the shift register unit. This dynamic adjustment prevents the TFT from continuously operating in the high-voltage stress state that causes threshold voltage shift, thereby improving reliability while maintaining manufacturing simplicity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements periodic action by making the gate voltage of low-level-holding TFTs switch periodically between high and low levels synchronized with the clock signals of the shift register. During the low-level-holding period, the gate voltage is reduced to a lower level, and during other periods it returns to the high level. This periodic voltage reduction allows the TFT to recover from stress accumulation, significantly reducing threshold voltage shift and extending circuit lifespan.

Inventive Principle:
Principle #19Periodic action

2Stability of the object's composition

If constant high gate voltage is applied to low-level-holding TFTs, then the low level holding function is strong, but the threshold voltage increases with operating time reducing circuit life

Engineering Contradiction:
Improvelow level holding stabilityVSAvoidcircuit lifespan
Core Design Contradiction:
Stability of the object's compositionVSDuration of action of stationary object

Solution Approach 1:

The patent applies dynamics principle by making the gate voltage of low-level-holding TFTs time-varying rather than constant. The voltage switches between high and low levels according to the clock signal phases, creating a dynamic operating condition. This dynamic voltage adjustment maintains the low-level-holding function during critical periods while reducing stress during non-critical periods, thereby extending circuit lifespan without sacrificing holding stability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies preliminary anti-action by proactively reducing the gate voltage of low-level-holding TFTs before the threshold voltage shift becomes critical. By periodically lowering the voltage during low-level-holding periods, the circuit preemptively counteracts the stress-induced threshold voltage increase, preventing the accumulation of damage that would otherwise lead to circuit failure and extending operational life.

Inventive Principle:
Principle #9Preliminary anti-action

3Power

If high over-drive voltage is applied to low-level-holding devices, then the driving capability is strong, but the threshold voltage shift accelerates and performance degrades faster

Engineering Contradiction:
Improvedriving capabilityVSAvoidperformance stability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent applies dynamics principle by making the over-drive voltage time-varying rather than constantly high. The gate voltage switches between high and low levels, creating dynamic over-drive conditions. This allows the low-level-holding TFTs to experience strong driving capability when needed while periodically reducing stress, preventing rapid threshold voltage shift and maintaining performance stability over time.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements periodic action by applying high over-drive voltage periodically rather than continuously. During clock signal phases when strong driving is needed, the gate voltage is high providing strong driving capability. During low-level-holding periods, the gate voltage is reduced, allowing the TFT to recover from stress. This periodic application of high over-drive voltage maintains performance while preventing accelerated degradation.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10192474B2Controllable voltage source, shift register and unit thereof, and display
Publication Date: 2019.01.29 PEKING UNIV SHENZHEN GRADUATE SCHOOL
  • US10192474B2 patent drawing
  • US10192474B2 patent drawing
  • US10192474B2 patent drawing

AI summary

A controllable voltage source, comprising a control module (1), a storage module (2) and an output module (3); the control module (1) is coupled between a high level end and a low level end; the storage module (2) comprises a storage capacitor; two ends of the storage capacitor are respectively coupled to the control module (1) to form a first terminal and a second terminal; the output module (3) is coupled to the second terminal, and the signal output end thereof is used to output to an external circuit the voltage signal of the controllable voltage source; the control module (1) responds the effective level of a first clock signal so as to enable the first terminal to be coupled to the high level end, and the first terminal is charged from the high level end; the control module (1) responds the effective level of a second clock signal so as to enable the second terminal to be coupled to the high level end, and the second terminal is charged from the high level end; and the first terminal is coupled to the low level end and discharges via the low level end. The effective level of the first clock signal does not overlap with the effective level of the second clock signal. Also disclosed are a shift register and unit thereof, and display based on the controllable voltage source.