Controller Clock Level Adjustment for Portable Terminal Power Reduction
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Solution Overview
Problem
Conventional portable terminals experience unnecessary increases in current consumption due to unconditional jumps to high clock levels, leading to inefficient power usage.
Innovation Solution
The apparatus and method optimize current consumption by dynamically adjusting the clock level and input voltage of a controller based on load states, transitioning from a minimum clock level to a preset Virtual Maximum Clock (VMC) level and then adjusting further according to specific load states, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the clock level is unconditionally jumped to the highest level when a task is generated, then the task processing speed is improved, but the current consumption increases unnecessarily
Solution Approach 1:
The patent applies dynamics by making the clock level adjustable and adaptive rather than fixed or unconditionally maximum. The controller dynamically transitions between multiple clock levels (first through fourth levels) based on real-time load states, allowing the system to optimize between processing speed and power consumption by matching clock frequency to actual task requirements
Solution Approach 2:
The patent implements parameter changes by varying the clock level parameter according to load conditions. Instead of maintaining a constant high clock level, the system changes the clock parameter to appropriate levels (first level for high load, second for medium-high, third for medium-low, fourth for low load), thereby reducing current consumption while maintaining adequate processing performance
2Productivity
If the clock level is increased to process tasks quickly, then the productivity is improved, but the power usage increases
Solution Approach 1:
The patent applies partial action by using only the necessary clock level for each task rather than always using the maximum level. The controller adjusts clock levels partially according to load states, applying higher clock levels only when needed for high-load tasks and lower levels for routine operations, thereby reducing unnecessary energy loss while maintaining productivity
Solution Approach 2:
The system dynamically adapts clock levels to match actual processing needs, transitioning between four distinct clock levels based on real-time load assessment. This dynamic adjustment ensures productivity is optimized without excessive power consumption by matching clock frequency to the actual computational demand
Data Source
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AI summary
An apparatus and method for reducing current consumption in a portable terminal are provided, in which upon generation of a task, a controller transitions to a Virtual Maximum Clock (VMC) level and changes a clock level from the VMC level according to a load state of the controller, to process the task. Moreover, the controller changes the clock level by at least one of transition from the VMC level to an RMC level, a stepwise increase from the VMC level, a stepwise decrease from the VMC level, and a hold at the VMC level, according to the load state of the controller.