Controller Clock Synchronization with Time-Window Update Suspension

The patent applies preliminary action by setting time windows in advance before clock cycles occur. The window setting unit pre-defines expected time intervals for clock cycle starts, and the determination unit checks whether each clock cycle starts within its corresponding pre-set time window. This preliminary preparation allows the system to verify clock cycle timing before proceeding with time synchronization, preventing unstable synchronization caused by noise or voltage changes without reducing update frequency.

The patent implements feedback by creating a closed-loop verification system. The determination unit continuously monitors whether clock cycles start within their expected time windows, and based on this feedback, the update control unit either permits or suspends time synchronization. This feedback mechanism ensures that only accurately timed clock cycles trigger synchronization updates, maintaining both continuity and precision. When clock cycles deviate from expected timing due to disturbances, the system detects this through the time window verification and suspends synchronization until timing is restored.

The patent applies partial action by selectively suspending time synchronization only for the specific clock cycle that deviated from its expected time window, rather than suspending all subsequent synchronizations. The update control unit permits synchronization for clock cycles that start within their time windows and suspends it only for those that don't. This partial approach maintains stability by filtering out bad clock cycles while minimizing time loss by allowing synchronization to continue for good clock cycles, thus reducing the cumulative suspension time.