Controller Command Scheduling for Read Performance and Data Retention

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Solution Overview

Problem

Current portable electronic devices with memory devices face challenges in optimizing read performance and data reliability due to the suspension of write operations during read commands, leading to delayed response times and potential data retention issues.

Innovation Solution

A controller is configured to analyze command queuing patterns and dynamically adjust the processing schedule of write commands based on the analysis, ensuring that write operations are prioritized or delayed to prevent frequent suspension and improve data reliability while maintaining read performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If write operations are suspended during read commands to maintain read performance, then read speed is improved, but data reliability deteriorates due to potential data retention issues

Engineering Contradiction:
Improveread speedVSAvoiddata reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The controller dynamically adjusts the write command processing schedule based on analyzed command patterns. When read commands are detected in the command queue, the controller selectively suspends or prioritizes write operations rather than using a fixed suspension policy, thereby adapting the write/read handling to actual workload conditions and reducing unnecessary suspensions that could cause data retention issues

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The controller analyzes command patterns in the command queue and uses this feedback to adjust the write command processing schedule. By monitoring the types and sequences of commands (read, write, trim), the controller makes informed decisions about when to suspend or process write operations, creating a closed-loop control system that balances read performance with data reliability

Inventive Principle:
Principle #23Feedback

2Speed

If write operations are frequently suspended to handle read commands, then read performance is maintained, but productivity deteriorates due to delayed response times

Engineering Contradiction:
Improveread performanceVSAvoidresponse time
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The controller implements dynamic scheduling of write commands based on real-time analysis of command queue patterns. Instead of uniformly suspending write operations, the controller adapts the write processing schedule to the actual command mix, processing write commands during periods when they will not interfere with read operations and suspending them only when necessary, thereby maintaining read performance while minimizing impact on overall productivity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The controller analyzes command patterns in advance by monitoring the command queue and determines the write command processing schedule before conflicts arise. By predicting when read commands will be issued and proactively planning write command timing, the controller prevents delays rather than reacting to them, improving both read performance and overall response time

Inventive Principle:
Principle #10Preliminary action

3Productivity

If write commands are processed without analysis to improve productivity, then response time is reduced, but reliability deteriorates due to increased suspension of write operations

Engineering Contradiction:
Improveresponse timeVSAvoiddata retention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The controller performs preliminary analysis of command queue patterns before processing write commands. By examining the sequence and type of commands (read, write, trim) in advance, the controller identifies opportunities to process write commands without suspension, thereby improving productivity while avoiding the reliability issues that arise from frequent suspensions

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller uses feedback from command pattern analysis to adjust write command processing. By continuously monitoring the command queue and using this information to make real-time scheduling decisions, the controller optimizes the balance between productivity and reliability, processing write commands efficiently while minimizing suspensions that could compromise data retention

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11288014B2Controller, operating method of controller and storage device including the same
Publication Date: 2022.03.29 SK HYNIX INC
  • US11288014B2 patent drawing
  • US11288014B2 patent drawing
  • US11288014B2 patent drawing

AI summary

A controller may be configured to control an operation of a nonvolatile memory and to determine a write command processing schedule by analyzing patterns of commands queued in a command queue during a first unit time, the commands queued in the command queue during the first unit time including a first write command, a first read command, or both and to process a second write command queued in the command queue during a second unit time subsequent to the first unit time, based on the determined write command processing schedule.