Controller Driver Over-Drive Circuit Memory Merging

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Solution Overview

Problem

Conventional controller drivers for mobile devices face challenges in reducing circuit size and power consumption while implementing over-drive driving techniques, which are necessary for improving response time in liquid crystal display panels, often requiring additional frame memories that increase circuit size and power consumption.

Innovation Solution

A controller driver design that compares input image data with data from the previous frame, using a converting circuit to generate output data based on the comparison, allowing for over-drive driving without the need for a separate frame memory, thereby reducing circuit size and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a separate frame memory is added to enable over-drive driving, then response time is improved, but circuit size and power consumption increase

Engineering Contradiction:
Improveresponse timeVSAvoidcircuit size
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges the frame memory function into the existing display memory by utilizing the same memory resource for both frame storage and over-drive driving. The memory control circuit selectively reads from the display memory based on whether over-drive driving is enabled, eliminating the need for a separate frame memory while maintaining response time performance.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The display memory is designed to serve multiple functions: it stores frame data for normal display operations and also serves as the frame memory for over-drive driving when enabled. This multi-functionality allows the system to achieve improved response time without adding separate dedicated frame memory hardware.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Speed

If a separate frame memory is added to enable over-drive driving, then response time is improved, but power consumption increases

Engineering Contradiction:
Improveresponse timeVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent merges the frame memory function into the existing display memory by utilizing the same memory resource for both frame storage and over-drive driving. The memory control circuit selectively reads from the display memory based on whether over-drive driving is enabled, eliminating the need for a separate frame memory while maintaining response time performance.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The display memory is designed to serve multiple functions: it stores frame data for normal display operations and also serves as the frame memory for over-drive driving when enabled. This multi-functionality allows the system to achieve improved response time without adding separate dedicated frame memory hardware.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If over-drive driving is implemented using conventional methods, then response time is improved, but device complexity increases

Engineering Contradiction:
Improveresponse timeVSAvoidcircuit size
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges the frame memory function into the existing display memory by utilizing the same memory resource for both frame storage and over-drive driving. The memory control circuit selectively reads from the display memory based on whether over-drive driving is enabled, eliminating the need for a separate frame memory while maintaining response time performance.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7586485B2Controller driver and display apparatus
Publication Date: 2009.09.08 RENESAS ELECTRONICS CORP
  • US7586485B2 patent drawing
  • US7586485B2 patent drawing
  • US7586485B2 patent drawing

AI summary

A driving apparatus for over-drive driving includes a display memory, a memory control circuit performing control for receiving input image data supplied from an image rendering device, reading out image data one frame before of the input image data from the display memory and for writing the input image data in the display memory as write image data for the display memory, and a image data control circuit for verifying whether or not the input image data from the memory control circuit coincides with the readout image data one frame before read out from the display memory. The apparatus also includes an LUT for outputting converted image data, a transfer data control circuit for selectively outputting the input image data or the converted image data, and latch circuits for latching image data of one horizontal line equivalent of pixels. A shift register circuit generates latch signal for image data.