Controller Error Bit Estimation for Data Storage Read Accuracy

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Solution Overview

Problem

Data storage devices face challenges in accurately reading data due to unreliable memory cells, which can result in erroneous bit values due to threshold voltage shifts, leading to data corruption and errors.

Innovation Solution

A data storage device with a controller that reads target data from memory cells, estimates error bits based on reference data from adjacent threshold voltage distributions, and performs error correction operations to ensure data integrity by adjusting log likelihood ratios or bit-flipping candidate data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional read operations are used without error estimation, then the read process is simple and fast, but data errors occur due to unreliable memory cells and threshold voltage shifts

Engineering Contradiction:

Improvedata accuracyVSAvoidread operation complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The controller performs preliminary error bit estimation using reference data from adjacent threshold voltage distributions before executing the main error correction operation. This preliminary action identifies unreliable memory cells and pre-corrects potential errors, improving final data accuracy while maintaining efficient read operations

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

Reference data from adjacent threshold voltage distributions serves as an intermediary to estimate error bits in the target data. This intermediary approach allows the system to indirectly identify errors without directly measuring unreliable memory cell states, resolving the contradiction between simple reading and accurate error detection

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If error correction operations are performed on all read data, then data reliability is improved, but processing time and computational resources increase

Engineering Contradiction:

Improvedata integrityVSAvoidread operation time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The controller performs partial error correction by first estimating error bits using reference data and then applying correction only to identified error bits rather than processing all data through full error correction algorithms. This selective approach maintains data integrity while reducing processing time and computational overhead

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

Error bit estimation using reference data is performed as a preliminary step before main error correction. This preliminary identification of error bits allows the system to focus correction resources only on affected data portions, minimizing time loss while ensuring data integrity

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS10001952B2Data storage device and operating method thereof including read error correction

Publication Date: 2018.06.19 SK HYNIX INC

AI summary

A data storage device includes a nonvolatile memory device including a plurality of memory cells; and a controller suitable for reading target data from a target page corresponding to the plurality of memory cells, estimating error bits of the target data based on reference data read from at least one reference page corresponding to the plurality of memory cells of the target data, and performing an error correction operation to the target data based on a result of the estimation.