Controller Secure Erase via Intermediate Program State

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Solution Overview

Problem

Frequent physical erase operations in non-volatile storage devices reduce their lifespan and compromise security, as they are not effectively managed by existing technologies.

Innovation Solution

A controller with an invalid block manager that detects and reprograms invalid data to an intermediate program state between adjacent states, executing a secure erase operation to prevent data leakage and reduce physical erase operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If physical erase operations are executed frequently to improve security, then data leakage is prevented, but the lifespan of the storage device is reduced

Engineering Contradiction:
ImprovesecurityVSAvoidlifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent changes the voltage distribution parameter of invalid data by reprogramming it to an intermediate program state between adjacent program states. This parameter transformation renders the data unrecoverable while avoiding physical erase operations, thus maintaining security without reducing device lifespan.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces an intermediate program state as a mediator between valid and erased states. By transitioning invalid data to this intermediate state, the system achieves secure data obscuration without requiring complete physical erasure, thereby resolving the contradiction between security and device longevity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Duration of action of stationary object

If physical erase operations are avoided to extend lifespan, then device durability is improved, but security against data leakage is compromised

Engineering Contradiction:
ImprovelifespanVSAvoidsecurity
Core Design Contradiction:
Duration of action of stationary objectVSReliability

Solution Approach 1:

Instead of physical erasure, the patent transforms the voltage distribution parameter of invalid data to an intermediate state. This parameter change achieves security by making data unrecoverable while preserving the physical memory structure, thus extending device lifespan without compromising security.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If invalid data is reprogrammed to intermediate program state, then security is improved without physical erase, but additional programming operations are required

Engineering Contradiction:
ImprovesecurityVSAvoidoperation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invalid block manager is designed to perform multiple functions: detecting invalid data, determining the appropriate intermediate program state, and executing the reprogramming operation. This multi-functional approach consolidates security operations within existing memory management infrastructure, reducing overall system complexity despite the added security functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11183254B2Controller and method of operating the same
Publication Date: 2021.11.23 SAMSUNG ELECTRONICS CO LTD
  • US11183254B2 patent drawing
  • US11183254B2 patent drawing
  • US11183254B2 patent drawing

AI summary

A method of operating a controller that controls a non-volatile memory device having a first memory block and a second memory block. The controller may detect invalid data of the first memory block, determine whether the detected invalid data is less than a reference value, and execute a secure erase operation of changing a voltage distribution of the detected invalid data based on a result of the determination. According to this method, it may be possible to enhance security of data stored in the non-volatile memory device, to prevent a physical erase operation from being excessively performed, and to increase the life span of the non-volatile memory device.