Controller Manages Interleaving for Nonvolatile Memory Read Performance
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Solution Overview
Problem
Data storage devices using semiconductor memory face challenges in maintaining read performance due to the scattering of logical block addresses during repeated overwrite and garbage collection, making interleaving difficult and resulting in degraded read performance.
Innovation Solution
A data storage device with a nonvolatile memory device comprising multiple memory groups in interleaving units, where a controller determines and manages interleavability of write-requested logical addresses, selects a victim memory group, and performs aggressive garbage collection to optimize memory region allocation and improve read performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory interleaving is performed to improve read performance, then read speed increases, but after repeated overwrite and garbage collection, logical block addresses become scattered and interleaving becomes difficult, degrading read performance
Solution Approach 1:
The controller determines and manages interleavability of logical block addresses in advance during write operations. By pre-establishing which logical block addresses are interleavable before garbage collection occurs, the system ensures that read performance can be maintained even after repeated overwrite and garbage collection operations scatter the physical positions of logical block addresses.
Solution Approach 2:
The system dynamically adjusts the interleaving strategy based on the current state of the memory device. The controller continuously determines interleavability during write operations and selects victim memory groups during garbage collection based on this information, allowing the interleaving scheme to adapt to the changing physical arrangement of data as the device undergoes repeated write and garbage collection cycles.
2Productivity
If aggressive garbage collection is performed to maintain memory efficiency, then storage device performance is maintained, but read performance may degrade if interleaving is disrupted
Solution Approach 1:
The controller uses the determined interleavability information as feedback to guide the garbage collection process. By selecting victim memory groups based on the interleavability of logical block addresses, the controller ensures that garbage collection operations do not disrupt the interleaving structure, thereby maintaining both storage device efficiency and read performance simultaneously.
Solution Approach 2:
The interleavability of logical block addresses is determined in advance during write operations, before garbage collection is needed. This preliminary determination allows the garbage collection process to proceed efficiently while preserving the interleaving structure, as the controller already knows which logical block addresses can be safely relocated during garbage collection.
Data Source
AI summary
A data storage device includes a nonvolatile memory device including a plurality of memory groups, each of which includes a plurality of memory regions in interleaving units and a controller configured to determine and manage interleaving-aware dirty (IAD) of a write-requested logical address whenever write-requested data is written in the nonvolatile memory device, and select a victim memory group among the plurality of memory groups using the interleaving-aware dirty.


