Controller Memory Access Rights for Offload Processing
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Solution Overview
Problem
Existing computing systems face inefficiencies in processing large amounts of data due to the data bottleneck phenomenon between processors and memory devices, leading to increased power consumption and reduced computation performance.
Innovation Solution
A data processing system with a controller that manages access rights to memory regions, allowing for offload processing of applications by storing data in specific memory regions and transferring access rights based on processing states, thereby minimizing data transmission between the host and memory device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data-driven computing is used to process large amounts of data in parallel, then computation performance is maximized, but data bottleneck phenomenon between processor and memory occurs
Solution Approach 1:
The memory device is divided into multiple memory banks, and the controller is divided into multiple processing units. Each processing unit can independently access different memory banks, enabling parallel data processing and eliminating the single-channel data bottleneck between processor and memory.
Solution Approach 2:
The patent transitions from traditional von Neumann architecture with sequential processing to a multi-dimensional parallel architecture where multiple processing units operate simultaneously on multiple memory banks, adding spatial parallelism to overcome the data bottleneck.
2Speed
If a processor is positioned within or near the memory device for memory-driven computing, then data access speed is improved, but power consumption increases due to large data transmission
Solution Approach 1:
Different processing units are assigned to process different types of data in different memory banks. Frequently accessed data is processed by dedicated processing units located near the memory device, reducing transmission distance and power consumption for critical data paths.
Solution Approach 2:
The controller performs partial processing of data within the memory device before transmitting to the host. By processing only the necessary portions of data locally and transmitting minimal results, power consumption for data transmission is significantly reduced while maintaining high access speed.
3Productivity
If the controller sets controller owning rights to the target region for offload processing, then processing efficiency is improved, but access flexibility is reduced
Solution Approach 1:
The access rights to memory regions are made dynamic rather than static. The controller can switch between controller-owned rights (for efficient offload processing) and host-owned rights (for flexible access) based on the processing state and requirements, optimizing both efficiency and flexibility adaptively.
Solution Approach 2:
The sharing memory management component acts as an intermediary that manages the transition of access rights between the host and controller. It mediates the balance between controller-owned rights for processing efficiency and host-owned rights for access flexibility, allowing seamless switching based on processing needs.
Data Source
AI summary
A data processing system may be configured to include a memory device, a controller configured to access the memory device when a host requests offload processing of an application, and process the application, and a sharing memory management component within the controller and configured to: set controller owning rights of access to a target region of the memory device in response to the host stores, in the target region, data used for the requested offload processing of the application; and set the controller owning rights of access or the host owning rights of access to the target region based on a processing state of the application.