Controller Memory Block Mode Switching for Data Reliability
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Solution Overview
Problem
Memory systems face challenges in maintaining data reliability and performance due to limited overprovisioning regions, especially when power is off, as they struggle to ensure data integrity without sufficient redundant storage and efficient use of memory blocks.
Innovation Solution
A controller method that switches memory blocks between single level cell and multi-level cell modes based on power states, storing at least two copies of system data in single level cell mode during power-off and converting these blocks to overprovisioning regions in multi-level cell mode during power-on, thereby ensuring data reliability and optimizing memory usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory blocks are allocated for system data storage, then data reliability is improved, but the overprovisioning region size is reduced
Solution Approach 1:
The patent applies dynamics by making the memory block allocation dynamic based on power state. System memory blocks are dynamically switched between SLC and MLC modes depending on whether the device is powered on or off, allowing the system to adaptively allocate resources for reliability during power-off while maintaining performance during power-on.
Solution Approach 2:
The patent changes the operational parameter of memory blocks from fixed to variable. Memory blocks can switch between SLC mode (higher reliability) and MLC mode (higher capacity) based on power state, effectively changing the reliability and capacity parameters dynamically to resolve the contradiction between data reliability and overprovisioning region size.
2Quantity of substance
If memory blocks operate in multi-level cell mode, then storage capacity is improved, but data reliability is reduced
Solution Approach 1:
The patent changes the operational mode parameter of memory blocks based on power state. During power-off, blocks switch to SLC mode for higher reliability; during power-on, blocks operate in MLC mode for higher capacity. This parameter change resolves the contradiction by allowing the system to optimize for different priorities at different times.
Solution Approach 2:
The patent implements periodic switching between SLC and MLC modes corresponding to power-on and power-off cycles. This periodic action allows the system to alternate between reliability-optimized and capacity-optimized states, effectively managing the trade-off between data reliability and storage capacity utilization.
3Reliability
If system data is stored in single level cell mode during power-off, then data reliability is improved, but memory performance is reduced
Solution Approach 1:
The patent uses periodic action by switching memory mode based on power cycles. During power-off periods when performance is not critical, the system uses SLC mode for reliable data storage. During power-on periods when performance matters, the system switches to MLC mode for higher throughput, thus resolving the contradiction between reliability and performance.
Solution Approach 2:
The patent makes the memory operational mode dynamic rather than static. The same memory blocks can operate in SLC mode during power-off for reliability and switch to MLC mode during power-on for performance, allowing the system to adaptively balance reliability and performance requirements based on operational context.
Data Source
AI summary
A method for operating a controller which controls a memory device including a plurality of memory blocks operating in multi-level cell mode or a single level cell mode includes setting some of the plurality of memory blocks operating in the multi-level cell mode, to system memory blocks in response to a power-off request from a host, setting the system memory blocks to the single level cell mode, and controlling the memory device to store system data in the system memory blocks.