Controller Partial Encoding for Data Integrity and Speed
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Solution Overview
Problem
In electronic systems, existing controllers face challenges in efficiently encoding and transmitting data between hosts and memory devices, particularly in reducing operation time during read operations, while ensuring the host can recover original data from encoded information.
Innovation Solution
A controller is designed with a randomizing circuit, masking circuit, operating circuit, and cyclic redundancy check circuit to selectively encode and decode data, allowing partial encoding of information for transmission, including generating random data, extracting select random data, performing operations on original data, and incorporating cyclic redundancy checks to ensure data integrity and recoverability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If full encoding is performed on all data before transmission to host, then data security and integrity are improved, but operation time and processing complexity increase
Solution Approach 1:
The patent divides the data transmission process into segments: full encoding is applied only to critical data portions (e.g., metadata, control information) while other data portions are transmitted without encoding or with simplified encoding. This segmentation allows the system to maintain data integrity for essential information while reducing overall processing time.
Solution Approach 2:
The patent implements partial encoding by applying encoding operations only to specific portions of data rather than the entire dataset. The encoder selectively processes data based on priority levels, data types, or importance, performing full encoding only where necessary for reliability while leaving other portions unencoded or partially encoded to minimize operation time.
2Reliability
If full encoding is performed on all data, then data security is improved, but device complexity and processing overhead increase
Solution Approach 1:
The patent segments the data stream into different categories (e.g., critical metadata, important data, optional data) and applies different encoding strategies to each segment. Critical metadata receives full encoding for security, while other segments receive reduced or no encoding, thereby reducing overall device complexity while maintaining essential security requirements.
Solution Approach 2:
The patent applies different encoding qualities to different portions of data based on their specific requirements. High-security data portions receive robust full encoding, while low-security portions receive minimal or no encoding. This local differentiation of encoding quality optimizes the balance between security and complexity.
3Loss of time
If mapping information is stored in host and transferred back in read operations, then operation time of memory system is reduced, but data transmission overhead increases
Solution Approach 1:
The patent extracts and removes redundant mapping information from the data transmission stream. By maintaining mapping information in the host and selectively transferring only essential updates or changes rather than complete mapping datasets, the system reduces data transmission overhead while preserving the benefit of reduced operation time.
Solution Approach 2:
The patent implements a mechanism where mapping information is discarded from repeated transmissions and recovered from host storage when needed. Instead of transferring complete mapping information in every read operation, the system discards redundant data and recovers necessary information from the host's stored mapping tables, reducing transmission overhead while maintaining operational efficiency.
Data Source
AI summary
There are provided a controller, an electronic system including the same, and an operating method of the controller and the memory system. The controller includes: a randomizing circuit configured to generate random data having a set number of bits; a masking circuit configured to output select random data by extracting some data according to a number of bits on which a partial encoding operation is to be performed, among the random data; an operating circuit configured to output encoded data and a portion of original data, by performing an operation sequentially on the original data and the select random data; and a cyclic redundancy check circuit configured to generate a cyclic redundancy check value by performing a cyclic redundancy check on the encoded data and the portion of original data, and output partially encoded data including the cyclic redundancy check value, the portion of original data, and the encoded data.