Storage Controller Pin Mapping via Data Pattern Detection
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Solution Overview
Problem
The increase in size of storage devices due to the need for separate pins to determine connection methods between memory devices and storage controllers, leading to potential interference and reduced signal integrity.
Innovation Solution
A storage controller and memory device system that determines connection structures without additional pins by generating and comparing data patterns through command/address and data lines, using a swap circuit to adjust signal arrangements as needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate pin is added to determine the connection method between memory device and storage controller, then the connection method can be clearly identified, but the size of the storage device increases
Solution Approach 1:
The patent extracts the connection method determination function from a dedicated pin and relocates it to the data lines. The memory device transmits connection information by generating specific data patterns (first data pattern and second data pattern) on the data lines during initialization, allowing the storage controller to identify the connection method without requiring additional pins.
Solution Approach 2:
The data lines are given multiple functions: they serve both as data transmission channels and as carriers for connection method identification. By encoding connection information in the data patterns transmitted on these existing data lines, the patent eliminates the need for separate dedicated pins while maintaining clear connection method identification.
2Adaptability or versatility
If multiple pins are added to support various connection structures, then connection versatility is improved, but device complexity and size increase
Solution Approach 1:
The patent uses parameter changes in the data patterns to encode different connection methods. The memory device generates specific data patterns (such as inverted or non-inverted patterns) on the data lines, and the storage controller detects these pattern parameters to identify the connection method. This allows multiple connection structures to be supported through parameter variation rather than physical pin multiplication.
Solution Approach 2:
The data patterns serve as an intermediary that carries connection method information between the memory device and storage controller. Instead of using additional pins as direct indicators, the connection information is mediated through the data patterns transmitted on the existing data lines, simplifying the overall system structure.
3Measurement precision
If additional pins are used to indicate connection method, then connection identification accuracy is improved, but signal interference increases
Solution Approach 1:
The patent merges the connection method identification function with the existing data transmission function. The same data lines used for data communication also carry connection method information through specific data patterns. This consolidation eliminates additional pins that would generate extra signals and potential interference, while maintaining accurate connection method detection through pattern recognition.
Data Source
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AI summary
A storage device (100) comprising a storage controller (200) including a plurality of first data pins (P28) and configured to send a command (CMD) through a command/address line, the command (CMD) including a first data pattern (DP1); and a memory device (300_1) including a plurality of second data pins (P18) connected to the plurality of first data pins (P28) through a plurality of data lines, and configured to, in response to receiving the command (CMD) from the storage controller (200), generate a second data pattern (DP2) corresponding to the first data pattern (DP1) based on the command (CMD), and send the second data pattern (DP2) to the storage controller (200) through the plurality of data lines, and the storage controller (200) configured to receive a third data pattern (DP3) in response to the memory device (300_1) sending the second data pattern (DP2), and determine a connection structure between the plurality of first data pins (P28) and the plurality of second data pins (P18) based on the second and third data patterns (DP2, DP3).