Multiplexed Controller Synchronization for Stable Multi-Core Output

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Solution Overview

Problem

In control systems with multiplexed controllers having multiple CPU cores, there is a risk of differing logic calculation results between controllers, leading to sudden changes in output values when switching occurs, and advanced calculations like model predictive control or AI can exceed processing times, preventing timely output to operation terminals.

Innovation Solution

Implement a control system with multiple controllers that utilize a first local data array to store calculation results, a second local data array to store results from other controllers, a global data array to synchronize results, and a tracking data transmission unit to ensure consistent output across controllers, using synchronized execution timing and data array synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If calculation is executed by a single CPU core in multiplexed controllers, then calculation result consistency between controllers is maintained, but the merit of multi-core CPU is not sufficiently utilized and processing speed is limited

Engineering Contradiction:
Improvecalculation result consistencyVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the control system into multiple independent controllers (active and standby) with identical multi-core CPU configurations. Each controller maintains its own CPU core execution state separately, allowing parallel processing while ensuring consistency through state synchronization rather than forcing single-core execution.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the execution parameter from single-core to multi-core by introducing a mechanism where multiple CPU cores execute calculation tasks simultaneously in both active and standby controllers. The consistency is maintained through synchronized execution timing and state comparison rather than limiting core usage.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If advanced logic calculation (MPC, AI) is performed, then control performance is improved, but processing time increases and may exceed the control cycle

Engineering Contradiction:
Improvecontrol performanceVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by having the standby controller continuously execute the same calculation tasks in advance, maintaining identical calculation results to the active controller. This pre-computation ensures that when switching occurs, the standby controller can immediately take over without additional processing delay, meeting the control cycle requirements even for advanced calculations like MPC and AI.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If multi-core CPU is used in multiplexed controllers, then calculation performance is improved, but difference in logic calculation result between controllers may occur causing sudden output changes

Engineering Contradiction:
Improvecalculation performanceVSAvoidoutput stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the execution state and calculation results of each CPU core in the standby controller are continuously monitored and compared with the active controller. When differences are detected or switching occurs, the system provides feedback to synchronize the states, ensuring output stability while utilizing multi-core performance.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent creates equipotentiality between active and standby controllers by ensuring both execute identical calculation tasks with synchronized timing on their respective CPU cores. This equalizes the calculation potential of both controllers, preventing sudden output changes during switching while maintaining high calculation performance through multi-core utilization.

Inventive Principle:
Principle #12Equipotentiality

Data Source

PatentUS20250216831A1Control system, control method of control system, and control program of control system
Publication Date: 2025.07.03 MITSUBISHI HEAVY IND LTD
  • US20250216831A1 patent drawing
  • US20250216831A1 patent drawing
  • US20250216831A1 patent drawing

AI summary

The present application relates to a control system including a plurality of controllers that have a plurality of CPU cores configured to execute a logic calculation including a plurality of calculation tasks that control a control target and are multiplexed with each other. Each of the plurality of controllers stores a calculation result of the plurality of calculation tasks as a first local data array, and stores a calculation result received from another controller as a second local data array. A data element selected from the first local data array and the second local data array is stored as a global data array referable to among the plurality of calculation tasks. The first local data array is transmitted to another controller as tracking data.